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DLD Lab Experiment

This document provides information on the Digital Logic Design course offered by the Electronics & Communication Engineering department. It is a 2-credit core course offered in the odd semester. The course objectives are to analyze and design combination and sequential logic, understand different logic families, and implement fixed- and floating-point representation. The 15 listed experiments cover topics such as logic gate design and verification, adders/subtractors, comparators, encoders/decoders, and registers. Recommended textbooks are also provided.

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Vinay Pasi
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424 views1 page

DLD Lab Experiment

This document provides information on the Digital Logic Design course offered by the Electronics & Communication Engineering department. It is a 2-credit core course offered in the odd semester. The course objectives are to analyze and design combination and sequential logic, understand different logic families, and implement fixed- and floating-point representation. The 15 listed experiments cover topics such as logic gate design and verification, adders/subtractors, comparators, encoders/decoders, and registers. Recommended textbooks are also provided.

Uploaded by

Vinay Pasi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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2.

Digital Logic Design

1. Department proposing the Electronics & Communication Engineering


course
2. Course Title Digital Logic Design
3. Structure 3

4. Credits 2
5. Course number (Code)
6. Status (Core/Elective) Core
7. Pre-requisites Not required
(course no./title)
8. Frequency of offering Odd Sem
9. Course Objectives (CO):
At the end of this course learner will be able to-
1. analyze and design various combination logic design
2. analyze and design various sequential logic design
3. Work with various logic families.
4. Understand and implement fixed- and floating-point representation.
10. List of Experiments:
1. To study and Understand nomenclature, Pin-Configuration and verification of the truth table
of all (AND, OR, NOT, NAND, NOR) logic gate.
2. To Design basic gate using universal Logic Gate (NAND and NOR)
3. To Design and Implement Half Adder and Half subtractor using Logic Gate.
4. To Design and Implement Full Adder and Full subtractor using Logic Gate.
5. Implement 4-bit binary Adder/Subtractor IC 7483.
6. Implementation of BCD Adder using 7483.
7. To Design and Implement 1-bit Magnitude Comparator using IC-7485.
8. To Design and Implement 2-bit Magnitude Comparator using Logic Gates.
9. To Design and Implement BCD to Excess-3 code converters using logic gate
10. To Design and Implement Binary to Gray code converters using logic gate
11. To Design and Implement 4:1 Multiplexers and 1:4 Demultiplexer.
12. To Design and Implement 8 to 3 Encoder and 3 to 8 decoder using logic gates.
13. To Design and Implement 4 bit SISO, SIPO, PISO, PIPO shift register using flip-flop.
14. To Design and Implement 3-bit Synchronous UP/Down counter.
15. To Design and Implement 3-bit Asynchronous UP/Down counter.
16. To Design and Implement ODD/EVEN parity checker/Generator using IC-74180.

Text Books:
1. An Engineering Approach to Digital Design, W. Fletcher, PHI Edition.
2. Fundamentals of Digital Logic with Verilog Design, S. Brown and Z. Vranesic, Tata McGraw
Hill New Delhi, 2008.
3. Digital System Design using VHDL, C. H. Roth, Thompson Publications, Fourth Edition,
2002.

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