B.N.M.

Institute of Technology
Semester: III B
Course Name: Computer Organization
Course Code:22CSE132
Manjushree K,
Assistant Professor,
Dept of CSE
Module 1
Chapter 1: Basic Structure of Computers
Functional Units

Basic functional units of a computer

Functional units
Input Unit – computer accept coded information through input
devices.
Examples: Mouse, Digital camera, microphones etc.,
Output Unit – receive information from the computer and carry
data that has been processed to the user.
Example: Monitor, printer, Headphones etc.,

Memory Unit - Store programs and data

Two classes of storage:
Primary Storage Secondary Storage

Example: Hard Drive disk, Floppy Disk, Compact disc etc.,

Functional Units
Arithmetic and Logic Unit (ALU) - Most computer operations
are executed in ALU of the processor.

• Example: Adding two numbers located in the memory.

• Registers: High-speed storage elements, and faster accessing

time.

Control Unit- All computer operations are controlled by the

control unit.

• The timing signals that govern the I/O transfers are also
generated by the control unit.
Basic Operational Concepts
• Individual instructions are brought from the memory into the
processor to executes it.

• Data to be used as operands are also stored in the memory.

Example:
Instruction 1: Add LOCA, R0

Instruction 2: Load LOCA, R1

Add R1, R0
Connection between the processor
MAR

PC

IR
Memory

MDR

R0

R1

Rn - 1
Control

ALU
Processor

and memory
n general purpose
registers

Fi gure 1.2. Connecti ons between the processor and the m em ory.

Connection between Processor and memory

Main Parts of Processor (Processor registers)
• Processor contains ALU, control-circuitry and many registers.
• Instruction-register (IR) holds the instruction that is currently
being executed.
• Instruction is then passed to the control-unit, which generates the
timing-signals that determine when a given action is to take place.
• PC contains the memory-address of the next-instruction to be
fetched & executed. It keeps track execution of the program.
• The processor also contains n general-purpose registers R0 through
Rn-1.
• MAR (Memory Address Register) holds the address of the
memory-location to be accessed.
• MDR (Memory Data Register) contains the data to be written into
or read out of the addressed location.
Operating steps are
1. Programs reside in the memory & usually get these through the
I/P unit.
2. Execution of the program starts when the PC is set to point at the
first instruction of the program.
3. Contents of PC are transferred to MAR and a Read Control
Signal is sent to the memory.
4. After the time required to access the memory elapses, the address
word is read out of the memory and loaded into the MDR.
5. Now contents of MDR are transferred to the IR & now the
instruction is ready to be decoded and executed.
6. If the instruction involves an operation by the ALU, it is
necessary to obtain the required operands.
7. An operand in the memory is fetched by sending its address to
MAR & Initiating a read cycle.

8. When the operand has been read from the memory to the MDR, it
is transferred from MDR to the ALU.

9. After one or two such repeated cycles, the ALU can perform the
desired operation.

10. If the result of this operation is to be stored in the memory, the

result is sent to MDR.

11. Address of location where the result is stored is sent to MAR & a
write cycle is initiated.

12. The contents of PC are incremented so that PC points to the next

instruction that is to be executed.
Interrupt
• Normal execution of programs may be preempted if some
device requires urgent servicing.

• The normal execution of the current program must be

interrupted, the device raises an interrupt signal.

• Interrupt Service Routine – providing appropriate Services

for the request by a processor.

• Example: Monitoring devices in an Industries.

Bus Structures

Single Bus Structure

To achieve a reasonable speed of operation, a computer must be
organized so that all its units can handle one full word of data at a
given time.
A bus is a group of lines that serves as a connecting path for
several devices.
There are 2 types of Bus structures:
1) Single Bus Structure 2) Multiple Bus Structure
1) Single Bus Structure
Because the bus can be used for only one transfer at a time, only 2
units can actively use the bus at any given time.
Bus control lines are used to arbitrate multiple requests for use of
the bus.
Advantages:
 Low cost
 Flexibility for attaching peripheral devices.
2) Multiple Bus Structure
Systems that contain multiple buses achieve more concurrency
in operations.
Two or more transfers can be carried out at the same time.
Advantage: Better performance.
Disadvantage: Increased cost.
The devices connected to a bus vary widely in their speed of
operation.
To synchronize their operational-speed, buffer-registers can be
used.

Buffer Registers
→ are included with the devices to hold the information during
transfers.

→ prevent a high-speed processor from being locked to a slow I/O

device during data transfers.
PERFORMANCE
• The most important measure of the performance of a computer is
how quickly it can execute programs.

• The speed with which a computer executes program is affected

by the design of its hardware and its machine level instructions,
compiler that translates program into machine level language.

• The total time required to execute the program is elapsed time is

a measure of the performance of the entire computer system.

• The time needed to execute a instruction is called the processor

time.
Just as the elapsed time for the execution of a program depends on
all units in a computer system, the processor time depends on the
hardware involved in the execution of individual machine
instructions.

The Processor Cache

Processor Clock
Execution of each instruction is divided into several steps, each of
which completes in one clock cycle.

Term: Hertz – cycles per second

P= length of 1 Clock cycle.

R (Clock Rate) = Inverse of P

BASIC PERFORMANCE EQUATION
Let T be total time required to execute the program.
N be the number of instructions contained in the program.
S be the average number of steps required to one instruction.
R be no of clock cycles per second generated by the processor to
execute one program.
T=N*S/R
This equation is called as Basic Performance Equation.
For the programmer the value of T is important. To obtain high
performance it is necessary to reduce the values of N and S and
to increase the value of R.
Pipeline and Superscalar Operation

 Pipelining – overlapping the execution of successive instructions.

Pipelined Instruction : Add R1,R2,R3

Example: Star 100, Cray -1 etc.,

 Superscalar operation – multiple instruction pipelined are

implemented on the processor.

Example: Pentium, Atom processor etc.,

CLOCK RATE
There are 2 possibilities for increasing the clock rate R.

i) Improving the integrated circuit technology (IC) makes logic

circuit faster , which reduce the time needed to complete basic
step. This allows clock period P to be reduced and clock rate R to
be increased.

ii) Reducing the amount of processing done in one basic step , also
makes it possible to reduce the clock period P.

In the presence of a cache, the percentage of accesses to the main

memory is small. The value of T will be reduced by the same
factor as R is increased because S and N are not affected.
PERFORMANCE MEASUREMENT

• The performance measure is the time taken by the computer to

execute a given bench mark.
• A non profit organization called SPEC selects and publishes
bench marks.
Module 1
Chapter 2: Machine Instructions and Programs

MEMORY LOCATIONS AND ADDRESS

• Memory consists of many millions of storage cells, each of

which can store a bit of information having the value 0 or 1.

• Memory is organized so that a group of n bits can be stored or

retrieved in a single, basic operation.

• Each group of n bits is referred to as a word of information, and

n is called the word length.

• A unit of 8 bits is called a byte.

Memory Words
• Modern computers have word lengths that typically range from 16
to 64 bits. If the word length of a computer is 32 bits, a single
word can store a 32-bit 2’s complement number or four ASCII
characters, each occupying 8 bits.

• Accessing the memory to store or retrieve a single item of

information, either a word or a byte, requires distinct names or
addresses for each item location for some suitable values of k, as
the addresses of successive locations in the memory.

• The 2^k addresses constitute the address space of the computer,

and the memory can have up to 2^k addressable locations. A 32-
bit address creates an address space of 232 or 4G (4 giga)
locations.
Byte Addressability

• Three basic information quantities to deal: Bit, Byte and Word.

• In byte addressable memory, successive addresses refer to the

successive byte locations in the memory.

• Byte locations have addresses 0,1,2……

• If the word length of the machine is 32 bits, successive words

are located at addresses 0,4,8,…., with each word consisting of
four bytes.
Big - Endian and Little - Endian Assignments
 It is impractical to assign distinct addresses to individual bit
locations in the memory.

 The most practical assignment is to have successive addresses

refer to successive byte locations in the memory byte as
addressable memory.

 Big-Endian: lower byte addresses are used for the more

significant bytes of the word.

 Little-Endian: lower byte addresses are used for the less

significant bytes of the word.
Big - Endian and Little - Endian Assignments

Big-Endian Little-Endian
Big - Endian and Little - Endian Assignments
Consider a 32-bit integer (in hex): 0x12345678 which consists of 4
bytes: 12, 34, 56, and 78.
 Hence this integer will occupy 4 bytes in memory.
 Assume, we store it at memory address starting 1000.
 On little-endian, memory will look like

On big-endian, memory will look like

Word Alignment
Words are said to be aligned in memory if they begin at a byte
address that is a multiple of the number of bytes in a word. The
memory of bytes in a word is a power of 2.

For example

(a) if the word length is 16 (2 bytes), aligned words begin at byte

addresses 0,2,4,…,

(b) a word length of 64 (23 bytes), aligned words begin at bytes

addresses 0,8,16 ….
Accessing Numbers,Characters and
Character Strings
• A number usually occupies one word. It can be accessed in the
memory by specifying its word address. Similarly, individual
characters can be accessed by their byte address.
• The beginning of the string is indicated by giving the address of
the byte containing its first character.
• There are two ways to indicate the length of the string.
(i) A special control character with the meaning “end of string” can
be used as the last character in the string.
(ii) a separate memory word location or processor register can
contain a number indicating the length of the string in bytes.
Memory Operations
Two basic operations involving the memory are needed,

 LOAD (Read or Fetch): The load operation transfers a copy of

the contents of a specific memory location to the processor. The
memory contents remain unchanged.

 STORE (Write): The store operation transfers an item of

information from the processor to a specific memory location,
destroying the former contents of that location.
Instructions & Instruction Sequencing
A computer must have instructions capable of performing 4 types of
operations:

1) Data transfers between the memory and the processor registers

(MOV, PUSH, POP)

2) Arithmetic and logic operations on data (ADD, SUB, MUL, DIV,

AND, OR, NOT)

3) Program sequencing and control (CALL,RET, LOOP, INT)

4) I/0 transfers (IN, OUT)

Register Transfer Notation (RTN)
• Possible locations which transfers of information occurs memory
locations, processor registers, or registers in the I/O subsystem.

• We identify a memory location by a symbolic name. For example,

LOC, PLACE, NUM etc indicate memory locations. R0, R5 etc
indicate processor register. DATAIN, OUTSTATUS etc indicate I/O
registers.

Statements,
R<-[LOC]
R3<-[R1]+[R2]
• The contents of a location are denoted by placing square brackets
around the name of the location.
Assembly Language Notation
• To represent machine instructions and programs, assembly language
format can be used.

Example,
i) Move LOC, R1;
ii) Add R1, R2, R3;

• A computer performs its task according to the program stored in

memory.

• A program is a collection of instructions which tell the processor to

perform a basic operation like addition, reading from keyboard etc.

• Possible locations that may be involved in data transfers are memory

locations, processor registers or registers in the I/O subsystem.
Basic Instruction Types
C = A+B;

 This statement is a command to the computer to add the current

values of the two variables A and B, and to assign the sum to a third
variable C.

 When the program is compiled, each variable is assigned a distinct

address in memory.

 The contents of these locations represent the values of the three

variables.

 The statement C<-[A]+[B] indicates that the contents of memory

locations A and B are fetched from memory, transferred to the
processor, sum is computed and then result is stored in memory
location C.
1. C = A + B;
Three Address Instruction
The instruction has general format

Operation source1, Source2, Destination

Example

Add A,B,C;

Performs the operation

C <- [A] +[B]

Operands A and B are called the source operands, C is called the

destination operand, and Add is the operation to be performed.
Two-Address Instruction
The instruction has general format
Operation Source, Destination
Example,
Add A,B;
Performs the operation
B<- [A] +[B]
When the sum is calculated, the result is sent to the memory and
stored in location B, replacing the original contents of this
location. This means that operand B is both a source and a
destination.

The operation C <- [A]+[B] can be performed by the two-instruction

sequence.
Move B, C
Add A, C
One Address Instruction
The instruction has general format
Operation Source/Destination
Example,
Add A;
Performs
AC<-[A]+[AC]
Adds the contents of memory location A to the contents of the
accumulator (AC) register and place the sum back into the
accumulator.
The operation C<- [A]+[B] can be performed by executing the
sequence of instructions
Load A
Add B
Store C
Zero Address instruction
The instruction has general format
Operation
The locations of all operands are defined implicitly. The operands are stored in
a structure called pushdown stack.
Example
ADD
Performs
TOS<- [TOS]+[TOS-1]
where both operands for addition are present in Top of Stack (TOS), Top two
elements are popped and final sum is pushed back to stack.

C=A+B task can be performed by the instruction sequence,

Move A, Ri
Move B, Rj
Add Ri, Rj,
Move Rj, C
Basic Instruction Types
2. X = (A + B) ∗ (C + D)

Three Address Instruction

X = (A + B) ∗ (C + D)

ADD A, B, R1 R1 ← M [A] + M [B]

ADD C, D, R2 R2 ← M [C] + M [D]

MUL R1, R2, X M [X] ← R1 ∗ R2

Two-Address Instruction
X = (A + B) ∗ (C + D)

MOV R1, A R1 ← M [A]

ADD R1, B R1 ← R1 + M [B]
MOV R2, C R2 ← M [C]
ADD R2, D R2 ← R2 + M [D]
MUL R1, R2 R2 ← R1∗R2
MOV X, R2 M [X] ← R2
One Address Instruction
X = (A + B) ∗ (C + D)

LOAD A AC ← M [A]
ADD B AC ← A [AC] + M [B]
STORE T M [T] ← AC
LOAD C AC ← M [C]
ADD D AC ← AC + M [D]
MUL T AC ← AC ∗ M [T]
STORE X M [X] ← AC
Zero Address instruction
X = (A + B) ∗ (C + D)

PUSH A TOS ← A
PUSH B TOS ← B
ADD TOS ← (A + B)
PUSH C TOS ← C
PUSH D TOS ← D
ADD TOS ← (C + D)
MUL TOS ← (C + D) ∗ (A + B)
POP X M [X] ← TOS
Instruction Execution & Straight-Line
Sequencing
The program is executed as follows:
1) Initially, the address of the first instruction is loaded into PC.
2)Then, the processor control circuits use the information in the PC to
fetch and execute instructions, one at a time, in the order of increasing
addresses-straight-line sequencing.
3) During the execution of each instruction, the PC is incremented by 4
to point to the next instruction.
i) Fetch phase, instruction is fetched from the memory location and
placed in the IR of the processor.
ii) Execute phase, contents of IR is examined to determine which
operation is to be performed. The specified operation is then performed
by the processor.
A program for C = [A] + [B]
Branching
Consider the task of adding a list of n numbers.
• Number of entries in the list n is stored in memory location N.
• Register R1 is used as a counter to determine the number of time
the loop is executed.
• Contents of location N are loaded into register R1 at the beginning
of the program.
• Loop is a straight line sequence of instructions executed as many
times as needed. It starts at location LOOP and ends at the
instruction Branch>0.
• During each pass through this loop,
 address of the next list entry is determined
 entry is fetched and added to R0.
• Instruction Decrement R1 reduces the contents of R1 by 1 each
time through the loop. Then Branch instruction loads a new value
into the program counter.

• As a result, the processor fetches and executes the instruction at

this new address called the branch target.

• Conditional branch instruction causes a branch only if a

specified condition is satisfied. If the condition is not satisfied,
the PC is incremented in the normal way, and the next instruction
in sequential address order is fetched and executed.
Branching

A straight-line program for adding n numbers. Using a loop to add n numbers

Condition Codes
• Processor keeps track of information about the results of various
operations. This is accomplished by recording the required
information in individual bits- condition code flags.
• These flags are grouped together in a special processor register-
condition code register (or statue register).
• Four commonly used flags are
→ N (negative) set to 1 if the result is negative, otherwise cleared to
0.
→ Z (zero) set to 1 if the result is 0; otherwise, cleared to 0.
→ V (overflow) set to 1 if arithmetic overflow occurs; otherwise,
cleared to 0.
→ C (carry) set to 1 if a carry-out results from the operation;
otherwise cleared to 0.
Addressing Modes
• Different ways in which the location of an operand is specified in an
instruction are referred to as addressing modes.

Generic Addressing modes

Implementation of Variable & Constants
• Variable is represented by allocating a register or memory location to
hold its value.
• Value can be changed as needed using appropriate instructions.
• There are 2 accessing modes to access the variables.
• i) Register mode ii) Absolute mode

 Register mode
• Operand is the contents of a register.
• Name of the register is given in the instruction.
• Registers are used as temporary storage locations where the data in a
register are accessed.
• Example: instruction Move R1, R2
 Absolute mode
• Operand is in a memory-location.

• Address of memory-location is given explicitly in the instruction.

Example: instruction Move LOC, R2;

 Immediate Mode
• Operand is given explicitly in the instruction.
• Clearly, the immediate mode is only used to specify the value of a source-
operand.
Example: instruction Move #200, R0 ;

Constant: Values are used frequently in high level program.

Statement A = B +6
Move B, R1
Add #6, R1
Move R1, A
Indirection & Pointers
• Instruction does not give the operand or its address explicitly.
• It provides information from which the memory-address of the
operand can be determined.
• This address as the effective address(EA) of the operand.
Indirect Mode
• EA of the operand is the contents of a register whose address
appears in the instruction.
• Register or memory-location that contains the address of an
operand is called a pointer.
• Indirection is denoted by ( ) sign around the register or memory-
location.
Example: Add (R1),R0;
 Operand is in memory. Register R1 gives the effective-address(B) of
the operand. The data is read from location B and added to contents of
register R0.
 To execute the Add instruction, the processor uses the value which is in
register R1, as the EA of the operand.
 It requests a read operation from the memory to read the contents of
location B. The value read is the desired operand, which the processor
adds to the contents of register R0.
 Indirect addressing through a memory location is also possible, In this
case, the processor first reads the contents of memory location A, then
requests a second read operation using the value B as an address to
obtain the operand.
Through a general-purpose register and Indirect addressing used in the program
memory location
 In program, Register R2 is used as a pointer to the numbers in the
list, and the operands are accessed indirectly through R2.

 Initialization-section of the program loads the counter-value n from

memory-location N into R1 and uses the immediate addressing-
mode to place the address value NUM1, which is the address of the
first number in the list, into R2. Then it clears R0 to 0.

 First time through the loop, the instruction Add (R2), R0 fetches
the operand at location NUM1 and adds it to R0.

 Second Add instruction adds 4 to the contents of the pointer R2, so

that it will contain the address value NUM2 when the above
instruction is executed in the second pass through the loop.
Indexing & Arrays
A different kind of flexibility for accessing operands is useful in dealing with
lists and arrays.

Index mode

The operation is indicated as X(Ri)

The effective-address of the operand is given by EA=X+[Ri] .

Contents of the index-register are not changed in the process of generating the
effective address.

 In an assembly language program, the constant X may be given either

→ as an explicit number

→ as a symbolic-name representing a numerical value.

Indexing & Arrays

Offset is given as a constant Offset is in the index register

Two ways of using the Index mode:

 Offset is given as a constant

The index register, R1, contains the address of a memory location, and the
value X defines an offset from this address to the location where the
operand is found.

 Offset is in the index register

An alternative use, the constant X corresponds to a memory address, and

the contents of the index register define the offset to the operand. In
either case, the effective address is the sum of two values; one is given
explicitly in the instruction, and the other is stored in a register.
Indexed addressing used in
A list of students marks
accessing test scores in the list
Base with Index Mode

• Index mode uses 2 registers which can be denoted as (Ri, Rj)

• Second register may be used to contain the offset X and know as base
register.

• Effective-address of the operand is given by EA=[Ri]+ [Rj]

• This form of indexed addressing provides more flexibility in

accessing operands, because both components of the effective
address can be changed.
Base with Index & Offset Mode

• Index mode uses 2 registers plus a constant, which can be denoted as

X(Ri, Rj)

• Effective-address of the operand is given by EA=X+[Ri]+[Rj]

• This added flexibility is useful in accessing multiple components

inside each item in a record, where the beginning of an item is
specified by the (Ri, Rj) part of the addressing-mode. In other
words, this mode implements a 3-dimensional array.
Relative Addressing Mode
• The effective address is determined using the PC in place of the
general purpose register Ri.

• X(PC) denotes an effective-address of the operand which is X

locations above or below the current contents of PC.

• Since the addressed-location is identified "relative" to the PC, the

name Relative mode is associated with this type of addressing.

• This mode is used commonly in conditional branch instructions.

• An instruction such as Branch > 0 LOOP ; Causes program

execution to go to the branch target location identified by name
LOOP if branch condition is satisfied.
Additional Addressing Modes
Two modes are useful for accessing data items in successive locations
in the memory.

 Auto-increment Mode

• Effective-address of operand is the contents of a register specified

in the instruction .

• After accessing the operand, the contents of this register are

automatically incremented to point to the next item in a list.

• This mode is denoted as (Ri)+ ; where Ri=pointer register

Additional Addressing Modes
 Auto-decrement Mode

• Contents of a register specified in the instruction are first

automatically decremented and are then used as the effective address
of the operand.

• This mode is denoted as -(Ri) ; where Ri=pointer register

• These 2 modes can be used together to implement an important data

structure called a stack.
Additional Addressing Modes

Indirect addressing used in the program

Assembly Language
• Complete set of symbolic names and rules for their use constitute an
assembly language.

• Set of rules for using the mnemonics in the specification of

complete instructions and programs is called the syntax of the
language.

• Programs written in an assembly language can be automatically

translated into a sequence of machine instructions by a program
called an assembler.

• User program in its original alphanumeric text formal-source

program

• Assembled machine language program-object program.

Assembly Language
 Move instruction is written is

MOVE R0,SUM;

• The mnemonic MOVE represents the binary pattern, or OP code, for

the operation performed by the instruction.

 The instruction

ADD #5,R3 ;

• Adds the number 5 to the contents of register R3 and puts the result
back into register R3.
Assembler Directives
• Directives are the assembler commands to the assembler concerning
the program being assembled. These commands are not translated
into machine opcode in the object program.
• EQU informs the assembler about the value of an identifier.
Ex: SUM EQU 200 ;
• This statement informs the assembler that the name SUM should be
replaced by the value 200 wherever it appears in the program.
• ORIGIN tells the assembler about the starting-address of memory-
area to place the data block. EX: ORIGIN 201
• DATAWORD directive tells the assembler to load a value (say 100)
into the location (say 204).
Ex: N DATAWORD 100;
Assembler Directives
• RESERVE directive declares that a memory-block of 400 bytes is
to be reserved for data and that the name NUM1 is to be associated
with address 208.

Ex: NUM1 RESERVE 400;

• END directive tells the assembler that this is the end of the source-
program text.

• RETURN directive identifies the point at which execution of the

program should be terminated.
Any statement that makes instructions or data being placed in a
memory-location may be given a label. The label(say N or NUM1) is
assigned a value equal to the address of that location.

Assembly language representation for the program

General format of a statement
• Most assembly languages require statements in a source program
to be written in the form

Label Operation Operands Comment

• Label is an optional name associated with the memory-address

where the machine language instruction produced from the
statement will be loaded.

• Operation field contains the OP-code mnemonic of the desired

instruction or assembler.

• Operand field contains addressing information for accessing one

or more operands, depending on the type of instruction.

• Comment field is used for documentation purpose to make the

program easier to understand.
Assembly and Execution of Programs
• Programs written in an assembly language are automatically
translated into a sequence of machine instructions by the
assembler.
• Assembler program
→ replaces all symbols denoting operations & addressing-modes with
binary-codes used in machine instructions.

→ replaces all names and labels with their actual values.

→ assigns addresses to instructions & data blocks, starting at the

address given in the ORIGIN directive.

→ inserts constants that may be given in DATAWORD directives.

→ reserves memory-space as requested by RESERVE directives.

Two Pass Assembler has 2 passes:

1) First Pass: work out all the addresses of labels.

Assembler scans through a source-program, it keeps track of all
names of numerical- values that correspond to them in a symbol-
table.
2) Second Pass: generate machine code, substituting values for the
labels.
When a name appears a second time in the source-program, it is
replaced with its value from the table.
Assembler stores the object-program on a magnetic-disk. The
object-program must be loaded into the memory of the computer
before it is executed. For this, a Loader program is used.
Debugger program is used to help the user find the programming
errors.

Debugger program enables the user

→ to stop execution of the object-program at some points of

interest.

→ to examine the contents of various processor registers and

memory-location .
Basic Input/output Operations
The Input and Output operation can be done in two ways:

1. Program Controlled

2. Memory Mapped

A video terminal connected to a CPU

• Consider the problem of moving a character-code from the
keyboard to the processor.

• For this transfer, buffer-register (DATAIN) & a status control

flags (SIN) are used.

• Striking key stores the corresponding character-code in an 8-bit

buffer register (DATAIN) associated with the keyboard.

• To inform the processor that a valid character is in DATAIN, a

SIN is set to 1.

• A program monitors SIN, and when SIN is set to 1, the processor

reads the contents of DATAIN.

• When the character is transferred to the processor, SIN is

automatically cleared to 0.
• If a second character is entered at the keyboard, SIN is against
set to1 and the process repeats.

• Analogous process takes place when characters are transferred

from the processor to the display.

• Buffer-register, DATAOUT and a status control flag, SOUT are

used for this transfer.

• When SOUT=1, the display is read to receive a character.

• Transfer of a character to DATAOUT clears SOUT to 0.

• Buffer registers DATAIN and DATAOUT and the status flags

SIN and SOUT are part of circuitry commonly known as a
device interface.
A program that reads a line of characters and displays it
Memory-Mapped I/O
• Some address values are used to refer to peripheral device buffer-
registers such as DATAIN and DATAOUT.

• No special instructions are needed to access the contents of the

registers; data can be transferred between these registers and the
processor using instructions such as Move, Load or Store.

• Example, contents of the keyboard character buffer DATAIN can

be transferred to register R1 in the processor by the instruction.

Move Byte DATAIN,R1

• Move Byte operation code signifies that the operand size is a byte.

• Test bit instruction tests the state of one bit in the destination,
where the bit position to be tested is indicated by the first operand.
Stacks and Queues
• Stack is a list of data elements with the accessing restriction that
elements can be added or removed at one end of the list only. This
end is called the top of the stack, and the other end is called the
bottom.

• The terms push and pop are used to describe placing a new item
on the stack and removing the top item from the stack,
respectively.

• Processor-register is used to keep track of the address of the

element of the stack that is at the top at any given time. This
register is called the SP (Stack Pointer).
Stacks

A stack of word in the memory

Stacks

Effect of Stack operations on the stack

Stacks
If we assume a byte-addressable memory with a 32-bit word length,

→The push operation can be implemented as

Subtract #4,SR

Move NEWITEM,(SP)

→ The pop operation can be implemented as

Move (SP),ITEM

Add #4,SP
Routine for a safe pop and push operation as follows

Checking for empty and full errors in pop and push operations
Queues
 Data are stored in and retrieved from a queue on a FIFO basis.

Difference between stack and queue?

1) One end of the stack is fixed while the other end rises and falls as
data are pushed and popped.

2) A single pointer is needed to point to the top of the stack at any

given time. On the other hand, both does of a queue move to higher
addresses as data are added at the back and removed from the front.
So, two pointers are needed to keep track of the two does of the
queue.

3) Without further control, a queue would continuously move through

the memory of a computer in the direction of higher addresses. One
way to limit the queue to a fixed region in memory is to use a
circular buffer.
Subroutines
• A subtask consisting of a set of instructions which is executed
many times is called a subroutine.

• The program branches to a subroutine with a Call instruction.

• Once the subroutine is executed, the calling-program must

resume execution starting from the instruction immediately
following the Call instructions i.e. control is to be transferred
back to the calling-program.

• The way in which a computer makes it possible to call and

return from subroutines is referred to as its subroutine linkage
method.
Subroutines
• The simplest subroutine linkage method is to save the return-
address in a specific location, which may be a register dedicated
to this function - link register.
• When the subroutine completes its task, the Return instruction
returns to the calling-program by branching indirectly through
the link-register.
• Call instruction is a special branch instruction that performs the
following operations:
→ Store the contents of PC into link-register.
→ Branch to the target-address specified by the instruction.
• Return instruction is a special branch instruction that performs
the operation:
→ Branch to the address contained in the link-register.
Subroutines

Subroutine Linkage using a Link register

Subroutine Nesting & the Processor
Stack
• Subroutine nesting means one subroutine calls another subroutine.

• In this case, the return-address of the second call is also stored in the
link-register, destroying its previous contents.

• Hence, it is essential to save the contents of the link-register in

some other location before calling another subroutine. Otherwise,
the return-address of the first subroutine will be lost.

• Subroutine nesting can be carried out to any depth. Eventually, the

last subroutine called completes its computations and returns to the
subroutine that called it.
Subroutine Nesting & the Processor
Stack
• The return-address needed for this first return is the last one
generated in the nested call sequence. That is, return-addresses
are generated and used in a LIFO order.

• This suggests that the return-addresses associated with subroutine

calls should be pushed onto a stack. A particular register is
designated as the SP to be used in this operation.

• SP is used to point to the processor-stack.

• Call instruction pushes the contents of the PC onto the processor-

stack.

• Return instruction pops the return-address from the processor-

stack into the PC.
Parameter Passing

• The exchange of information between a calling-program and a

subroutine is referred to as parameter passing.

• The parameters may be placed in registers or in memory-

location, where they can be accessed by the subroutine.

• Alternatively, parameters may be placed on the processor-stack

used for saving the return-address.
Parameter Passing
A program for adding a list of numbers using subroutine with the
parameters passed through registers.

Program written as a subroutine; parameters passed through registers

The Stack Frame
• Locations constitute a private work space for the subroutine,
created at the time the subroutine is entered and freed up when
the subroutine returns the control to calling program such space
is called Stack Frame.

• The work-space is

→ created at the time the subroutine is entered &

→ freed up when the subroutine returns control to the calling-

program.
Stack Frame
A program for adding a list of numbers using subroutine with the
parameters passed to stack.

Program written as a subroutine; Parameter passed on the stack

Stack Frame
• Frame pointer(FP) is used to access the parameters passed
→ to the subroutine
→ to the local memory-variables
• The contents of FP remains fixed throughout the execution of the
subroutine, unlike stack-pointer SP, which must always point to
the current top element in the stack.
Stack Frame
Example of a commonly used layout for information in a stack-
frame.

A subroutine stack Frame

Operation on Stack Frame
• Initially SP is pointing to the address of old TOS.
• The calling-program saves 4 parameters on the stack.
• The Call instruction is now executed, pushing the return-address
onto the stack.
• Now, SP points to this return-address, and the first instruction of
the subroutine is executed.
• Now, FP is to be initialized and its old contents have to be
stored. Hence, the first 2 instructions in the subroutine are:
Move FP,-(SP)
Move SP,FP
• The FP is initialized to the value of SP i.e. both FP and SP point
to the saved FP address.
• The 3 local variables may now be pushed onto the stack. Space
for local variables is allocated by executing the instruction.
Subtract #12,SP

• Finally, the contents of processor-registers R0 and R1 are saved

in the stack.
• The subroutine now executes its task. When the task is
completed, the subroutine pops the saved values of R1 and R0
back into those registers, removes the local variables from the
stack frame by executing the instruction.

Add #12,SP

• And subroutine pops saved old value of FP back into FP. At this
point, SP points to return-address, so the Return instruction can
be executed, transferring control back to the calling program.
Stack Frames For Nested Subroutines

• Stack is very useful data structure for holding return-addresses

when subroutines are nested.

• When nested subroutines are used; the stack-frames are built up

in the processor-stack.

• Consider the following program to illustrate stack frames for

nested subroutines.
Nested Subroutines
Stack Frames for Nested Subroutines
Stack Frames For Nested Subroutines
Flow of Execution is as follows:
• Main program pushes the 2 parameters param2 and param1 onto
the stack and then calls SUB1.
• SUB1 has to perform an operation & send result to the main-
program on the stack.
• During the process, SUB1 calls the second subroutine SUB2 (in
order to perform some subtask).
• After SUB2 executes its Return instruction; the result is stored in
register R2 by SUB1.
• SUB1 then continues its computations and eventually passes
required answer back to main-program on the stack.
• When SUB1 executes return statement, the main-program stores
this answers in memory-location RESULT and continues its
execution.
Additional Instructions
LOGIC INSTRUCTIONS
• Logic operations such as AND, OR, and NOT applied to individual
bits.
• These are the basic building blocks of digital-circuits.
• This is also useful to be able to perform logic operations is
software, which is done using instructions that apply these
operations to all bits of a word or byte independently and in
parallel.
• Example, the instruction
Not dst
SHIFT AND ROTATE INSTRUCTIONS
• There are many applications that require the bits of an operand to be
shifted right or left some specified number of bit positions.

• The details of how the shifts are performed depend on whether the
operand is a signed number or some more general binary-coded
information.

• For general operands, we use a logical shift. For a number, we use

an arithmetic shift, which preserves the sign of the number.
Logical Shifts
• Two logical shift instructions are needed, one for shifting left
(LShiftL) and another for shifting right (LShiftR).
• These instructions shift an operand over a number of bit positions
specified in a count operand contained in the instruction.
A routine that packs two
Logical and arithmetic shift Instruction BCD digits
ROTATE OPERATIONS
• In shift operations, the bits shifted out of the operand are lost,
except for the last bit shifted out which is retained in the Carry-
flag C.
• To preserve all bits, a set of rotate instructions can be used.
• They move the bits that are shifted out of one end of the operand
back into the other end.
• Two versions of both the left and right rotate instructions are
usually provided.
• In one version, the bits of the operand are simply rotated. In the
other version, the rotation includes the C flag.
Rotate Instructions
Additional Instructions
Multiplication and Division
Two signed integers can be multiplied or divided by machine
instructions with the same format,
The instruction
Multiply Ri, Rj
Performs the operation
Rj <- [Ri] * [Rj]

Instruction sets provide a signed integer Divide instruction

Divide Ri, Rj
Performs the operation
Rj <- [Rj]/[Ri]
Encoding of Machine Instructions
• To be executed in a processor, an instruction must be encoded
in a binary-pattern. Such encoded instructions are referred to as
machine instructions.

• The instructions that use symbolic names and acronyms are

called assembly language instructions.

• We have seen instructions that perform operations such as add,

subtract, move, shift, rotate, and branch. These instructions
may use operands of different sizes, such as 32-bit and 8-bit
numbers.
Let us examine some typical cases:
Instruction
Add R1, R2;
Has to specify the registers R1 and R2, in addition to the OP
code. If the processor has 16 registers, then four bits are needed
to identify each register. Additional bits are needed to indicate
that the Register addressing-mode is used for each operand.
Instruction
Move 24(R0), R5 ;
Requires 16 bits to denote the OP code and the two registers,
and some bits to express that the source operand uses the Index
addressing mode and that the index value is 24.
• In all these examples, the instructions can be encoded in a 32-
bit word.
• The OP code for given instruction refers to type of operation
that is to be performed.
• Source and destination field refers to source and destination
operand respectively.
• The "Other info" field allows us to specify the additional
information that may be needed such as an index value or an
immediate operand.
• Using multiple words, we can implement complex
instructions, closely resembling operations in high-level
programming languages. The term complex instruction set
computers (CISC) refers to processors that use.
• CISC approach results in instructions of variable length,
dependent on the number of operands and the type of
addressing modes used.

• In RISC (reduced instruction set computers), any instruction

occupies only one word.

• The RISC approach introduced other restrictions such as that all

manipulation of data must be done on operands that are already
in processor registers.

Ex: Add R1,R2,R3

• In RISC type machine, the memory references are limited to

only Load/Store operations.
Encoding instructions into 32-bit Words