Basic Computer Organization and Design

Instruction Codes
• Program: A Program is a set of instruction that specify the operations, operands
and the sequence by which processing has to occur.
• Operation can be addition, subtraction, shifting and operand can be
register operand or memory operand
• Computer Instruction: A computer instruction is a binary code that specifies a
sequence of microoperation for the computer.
• I want to perform addition and for performing addition the basic operation
which are required to fetch the data from memory to get it stored into the
register then perform the addition store back result to the memory so such
microoperation are defined based on this binary code and that is
instruction.
• The computer reads each instruction from memory and places it in a
control register.
• The control then interprets the binary code of the instruction and
proceeds to execute it by issuing a sequence of microoperation.
Instruction Code
An instruction code is a group of bits that instruct the computer
to perform a specific operation.
ADD 457
Instruction code divide into two parts:
Operation code(Opcode); is a group of bits that
define such operations as add, subtract, multiply,
shift….
Must consist of at least n bits for a given 2n
distinct operation.
Unique binary code is assigned to every opcode,
they are to be fixed at the timing of designing of
the computer.
For 64 distinct operation 6-bit opcode is
required.
110010 for ADD. When this operation code is
decoded in the control unit the computer issues
control signals to read an operation from
memory and add the operand to a process
register.
Stored
program
Organization
If the second part of an instruction
format specifies the address of an
Direct and In operand, the instruction is said to have
a direct address
Direct
Addressing In indirect address, the bits in the
second part of the instruction designate
an address of a memory word in which
the address of the operand found.
PC (program Counter (12)): holds the
address of next instruction

Computer Register AR(Address Register (12)): holds the

address of memory

IR (Instruction Register(16)): holds

instruction code.

TR(Temporary Register(16)): holds

temporary data generate during certain
micro operation. Also it used during the call
and return of some subroutines

DR(Data Register(16)): holds the memory

operand. Data fetch from memory will be
getting stored into this register

AC(Accumulator (16)): processor register.

Store the result of any operation.

OUTR(output register): holds output

INPR Input register: holds input character
character
How data transfer from
memory to AC?
Computer Instruction
• Memory Reference Instruction: these
instruction are going to deal with memory
operands, means the operands provides to
this instruction would be fetched from
memory.
• Register Reference Instruction : perform
certain instruction on register.
• Input-output Instruction
Instruction Set Completeness

01 02 03 04 05
Instruction set is said 1. Arithmetic, logic 2. Instruction for 3. Program control 4 Input and output
to be complete if it and shift instruction moving information instruction together instruction
include sufficient to and from memory with instruction that
number of instruction and processor check status
in each of the register conditions.
following categories:
Timing and control

CLOCK PLUS ARE APPLIED TO ALL FLIP THE CONTROL SIGNAL ARE GENERATED IN
ALL REGISTER ARE CONTROLLED BY A FLOP AND REGISTER IN THE SYSTEM. BUT THE CONTROL UNIT.
MASTER CLOCK GENERATOR. THIS CLOCK PLUS DOES NOT CHANGE
STATE OF REGISTER UNLESS THE REGISTER
IS ENABLED BY A CONTROL SIGNAL.
Control organization

• Hardwired control : the control logic is implemented

with gates, flip flops decoders and other digital circuits.
• It can be optimized to produce a fast mode of operation
• It require changes in the wiring among the various
component if the design has to be modified or changed
• Microprogrammed control: the control information is
stored in a control memory.
• The control memory is programmed to initiate the
required sequence of microoperations.
• Any required changes or modifications can be done by
updating the microprogram in control memory
Control unit of basic computer

D3T4: SC<-0
Instruction cycle
• A program residing in the memory unit of the computer
consists of a sequence of instructions. In the basic
computer each instruction cycle consists of the
following phases:
1. Fetch an instruction form memory.
2. Decode the instruction
3. Read the effective address from memory if the
instruction has an indirect.
4. Execute the instruction.
• After step 4 the control goes back to step 1 to fetch
decode and execute the next instruction.
• This process continues unless a HALT instruction is
encountered
Fetch and decode
• PC is loaded with the address of the first instruction in the program.
• Sequence counter SC is cleared to zero (0). After each clock plus SC is
incremented by one.
• The microoperation for fetch and decode phases are as follow:
Determine the
type
of instruction
Questions
A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one
word of memory. The instruction has four parts: an indirect bit, an operation code, a register code part to
specify one of 64 registers, and an address part.
a) How many bits are there in the operation code, the register code part, and the address part?
b) Draw the instruction word format and indicate the number of bits in each part.
Register
reference
instruction
Memory reference instruction

1. AND : AND to AC 2 .ADD: ADD to AC

• This is an instruction that perform the This instruction adds the content of the memory
AND logic operation on pairs of bits in word specified by the effective address to the value
AC and the memory word specified by of AC. The sum is transferred into AC and the output
the effective address. The result of the carry Cout is transferred to the E (extended
operation is transferred to AC accumulator) flip flop
• LDA : Load to AC STA: Store AC
• This instruction transfer This instruction store the content of AC into the
the memory word memory word specified by the effective address
specified by the effective
address to AC
• BUN : Branch Unconditionally
ISZ: Increment and skip if zero
• This instruction transfer the program to These instruction increments the word specified by the effective
instruction specified by the effective address, and if the incremented value is o, PC is incremented by 1.
address. The BUN instruction allows the since it is not possible to increment a word inside the memory, it is
programmer to specify an instruction out of necessary to read the word into DR, increment DR, and store the
sequence and the program branches word back into memory
unconditionally
• BSA; Branch and save Return Address
• This instruction is useful for branching to a
portion of the program called a subroutine
or procedure. When executed, the BSA
instruction stores the address of the next
instruction in sequence (which is available
in PC) into a memory location specified by
the effective address
Input-output
instruction

FGI is set to 0
Input data is shifted into
INPR
FGI is set to 1
Information from INPR is
transferred to AC

Initially FGO is 1
Information from AC to
OUTR
FGO is set to 0
Data transfer from OUTR to
output device
Input-output instruction
Interrupt cycle
• During the normal execution, the
program interrupt may occur that
means some input or output operation
may occur and we are changing our
control of execution of our program
Design of basic computer

A basic computer consists of the following hardware components;

1. A memory unit with 4096 words of 16 bits each
2. Nine registers : AR, DR, AC, IR, TR, PC, OUTR, INPR and SC
3. Seven flip flops: I, S, E, R, IEN, FGI, FGO
4. Two decoders: a 3X8 operation decoder and 4X16 timing decoder
5. A 16-bit common bus
6. Control logic gates
7. Adder and logic circuit connected to the input of AC
Flow chart for
computer operation
Instruction formats
• Instruction are categorized into different formats with respect to the
operand fields in the instructions:
1. Three Address Instruction
2. Two Address Instruction
3. One Address Instruction
4. Zero Address Instruction
5. RISC instruction
Three address instruction
• Computer with three address
instruction formats can use each
address field to specify either a
processor register or a memory
operand
X=(A+B)*(C+D)
Advantage: It result is short program
when evaluating arithmetic Expression
Disadvantage: Binary code instruction
require too many bits to specify three
address.
Two address instruction
• Two address instruction are the
most common in commercial
computers. Each address field can
specify either a processor register
or a memory word.
One Address instruction
• One address instruction
use an implied
accumulator register for
all data manipulation
Zero address instruction
• A stack organization
computer does not use
an address field for
instruction ADD and
MUL.
• The PUSH and POP
instruction
RISC instruction
• Reduced instruction set computer (RISC)
• The instruction set of a typical RISC processor is
restricted to the use of load and store instruction
when communicating between memory and CPU
• All other instruction are executed within the
register of the CPU without referring to memory.
Addressing mode
• Operation field of an instruction specifies the operation to be performed.
• The way the operand are chosen during program execution is dependent on the addressing
mode of the instruction.
1. Implied mode
2. Immediate mode
3. Register mode
4. Autoincrement or Auto decrement mode
5. Direct mode
6. Indirect mode
7. Relative Address Mode
8. Indexed Addressing mode
9. Base Register Addressing mode
Implied mode
• Operand are specified implicitly in the definition of the instruction
• Ex: CMA (complement Accumulator)
• Operand in the accumulator register is implied in the definition of the
instruction.
Immediate mode
• Operand is specified in the instruction itself.
• Instruction has an operand field rather than an address field.
MOV R1, 05H
Register Mode
Operands are in register that reside within the CPU
MOV R1,R2
Register Indirect Mode
• Instruction specifies a register in the CPU whose content give the address of
operand in memory.
• Selected register contain the address of the operand rather than the operand
itself.
MOV [R1], R2….value of R2 is moved to memory location specified in
R1
Autoincrement or Autodecrement Mode:
Similar to the register indirect mode except that the register is incremented or
decremented after (or before) its value is used to access memory.
When the address stored in the register refer to a table of data in memory it is
necessary to increment or decrement the register after every access to the
table.
Direct Address Mode:
The effective address is equal to the address part of the instruction
Effective address: is defined to be the memory address obtained from
the computational dictated by the given addressing mode.
ADD 457
Indirect Address mode:
Address field of the instruction gives the address where the effective
address is stored in memory.
Control fetch the instruction from memory and uses its address part to
access memory again to read the effective address.
Effective address=address part of instruction + content of CPU register
Relative Address mode:
• Content of PC is added to the address part of the instruction in order to
obtain the effective address.
Indexed Addressing Mode:
Content of an index register is added to the address part of the instruction to
obtain the effective address.
Index register is a special CPU register that contain an index value.
Access array from memory
Base Register Addressing Mode:
Content of base register is added to the address part of the instruction
• An Instruction is stored at location 300 with its address field at location 301. the address field has value
of 400. A Processor register R1 contains the number 200. Evaluate the effective address if the address
mode of instruction is direct, immediate, Relative, Reg indirect, Index (with R1 is index register).

• A relative mode branch type of instruction is stored in memory at an address equivalent to decimal 900. The
branch is made to an address equivalent to decimal 382. What should be the value of the relative address field of
the instruction (in decimal)?
• a. direct = 400
• b. Immediate = 301
• c. Relative = 302 + 400 = 702
• d. Reg. Indirect = 200
• e. Indexed = 200 + 400 = 600

• Relative address = 382 – 901 = – 519

• For a basic computer with 16-bit instruction format (I-bit + 3-bit opcode + 12-bit address), the basic instructions are:
• Symbol I=0 I=1 Description
• AND 0xxx 8xxx AND memory word to AC
• ADD 1xxx 9xxx Add memory word to AC
• LDA 2xxx Axxx Load AC from memory
• STA 3xxx Bxxx Store content of AC into memory

• If an instruction has the value B03F (Hex) then explain the operation performed by it.
• Consider the following snapshot of memory:

Mem. Address Mem. Contents

2A3 603B

3CB 059A

4AC 83CB

59A 8A26
If the contents of PC=4AC and AC=2FA1 then which instruction will be fetched next and what it
means?
Explain the binary operations that will be performed by the instruction fetched in part b above and
what will be the contents of AC after execution of that instruction.
a. Contents of AC are stored to memory location 03F
b. Next instruction fetched: 83CB and it will perform AND operation between AC and
indirect memory word.
c. 8A2C & 2FA1
1000 1010 0010 1100
0010 1111 1010 0001
----------------------------
0000 1010 0010 0000 = 0A20 is the accumulator contents