COMPUTER ORGANIZATION ARCHITECTURE

The general purpose digital computers are capable of executing various

micro-operations and in addition, can be instructed as to what specific
sequence of operations it must perform.
The user of a computer can control the process by means of a program.
A program is a set of instructions that specify the operations, data, and
the control sequence
An instruction is stored in binary code that specifies a sequence of micro
operations.
Instruction codes together with data are stored in memory (Stored
Program Concept)
CONTD…

A computer instruction is a binary code that specifies a sequence of

microoperations for the computer.
Each computer has its unique instruction set.
Instruction codes and data are stored in memory.
The computer reads each instruction from memory and places it in a
control register.
The control unit interprets the binary code of the instruction and
proceeds to execute it by issuing a sequence of micro-operations.
INSTRUCTION CODE
An Instruction code is a group of bits that instructs the computer to
perform a specific operation (sequence of microoperations). It is
divided into parts (basic part is the operation part)
The operation code of an instruction is a group of bits that defines
certain operations such as add, subtract, shift, and complement.

15 12 11 0 15 12 11 0

Op. Code Address data

instruction Not an instruction

The number of bits required for the operation code depends on the total
number of operations available in the computer.
The operation code must consists of n-bits for given 2n (or less) distinct
operations.
For example- Consider a computer with 64 distinct operations, one of
them being an ADD operation. The operation code consists of 6 bits such
as 110010 assigned to ADD operation.
When control unit decodes it, the computer issues control signals to read
an operand from memory and add operand to a processor register.
CONTD…
An operation must be performed on some data stored in processor
registers or in memory.
An instruction code must therefore specify not only the operation,
but also the location of the operands (in registers or in the memory),
and where the result will be stored (registers/memory).
Memory words can be specified in instruction codes by their
address.
Processor registers can be specified by assigning to the instruction
another binary code of k bits that specifies one of 2k registers.
Each computer has its own particular instruction code format
Instruction code formats are conceived by computer designers who
specify the architecture of the computer
STORED PROGRAM ORGANIZATION

An instruction code is usually divided into operation code, operand

address, addressing mode, etc.
The simplest way to organize a computer is to have one processor
register (accumulator AC) and an instruction code format with two
parts.
The first part specifies the operation to be performed and the second
specifies an address.
The memory address tells the control where to find an operand in
memory.
This operand is read from memory, used as the data to be operated
on together with the data stored in the processor register (AC).
As shown in figure, instructions are stored in one section of memory
and data in another.
For a memory unit with 4096 words we need 12 bits to specify an
address since 212 = 4096.
If we store each instruction code in 16 bits memory word, we have
4-bits for operation code to specify, 24 = 16 possible operations.
ADDRESSING MODES

The way any operand is selected during the program execution is

dependent on the addressing mode of the instruction.
The different types of addressing modes are:
⚫ Immediate
⚫ Direct Address
⚫ Indirect address
⚫ Effective address
IMMEDIATE MODE
It is sometimes convenient to use the address bits of an instruction
code not as an address but as an actual operand.
When second part of an instruction code specifies an operand, the
instruction is said to have an immediate operand.

Opcode Operand
DIRECT ADDRESS

When second part of instruction set specifies the address of an

operand, the instruction is said to have a direct address.
INDIRECT ADDRESS
In this, the bits in the second part of the instruction designate an
address of a memory word in which the address of the operand is
found.
EFFECTIVE ADDRESS
Effective address is an address where an operand is physically
located.

Effective address: 457 Effective address: 1350

DIRECT AND INDIRECT ADDRESS EXAMPLE

Fig (a)

Fig (b) Fig (c)

EXPLANATION -
In fig(a) instruction code consist of 3-bit operation code, 12-bit
address, and an indirect address mode bit designated by I ( it is 0 for
direct address & 1 for indirect).

In fig(b), the I bit is 0, so instruction is recognized as direct address

instruction. The opcode specifies ADD operation, address part is
binary equivalent of 457.
The control unit finds operand at address 457 and adds it to content
of process register, AC.

In fig(c), the I bit is 1, making it as indirect address instruction. The

address part is binary equivalent of 300.
The control unit goes to address 300 to find address of the operand.
The address of the operand in this case is 1350.
The operand found at address 1350 is added to the contents of AC.
COMPUTER REGISTERS
Computer instructions are normally stored in consecutive memory
locations and executed sequentially one at a time.
The control reads an instruction from a specific address in memory
and executes it, and so on.
This type of sequencing needs a counter to calculate the address of
the next instruction after execution of the current instruction is
completed.
It is also necessary to provide a register in the control unit for storing
the instruction code after it is read from memory.
The computer needs processor registers for manipulating data and a
register for holding a memory address.
The memory unit has a capacity of 4096 words and each word
contains 16 bits.
Following table shows the list of registers for the basic computer :

Register No. of bits Register name Function

symbol

DR 16 Data register Holds memory operand

AR 12 Address register Holds address for memory

AC 16 Accumulator Processor register

IR 16 Instruction register Holds instruction code

PC 12 Program counter Holds address of

instruction
TR 16 Temporary register Holds temporary data

INPR 8 Input register Holds input character

OUTR 8 Output register Holds output character

PROGRAM COUNTER(PC):

It hold the address of the next instruction to be read from

memory after the current instruction is executed.
Instruction words are read and executed in sequence unless a
branch instruction is encountered.
A branch instruction calls for a transfer to a non-consecutive
instruction in the program.
The address part of a branch instruction is transferred to PC to
become the address of the next instruction.
To read instruction, memory read cycle is initiated, and PC is
incremented by one(next instruction fetch).
Registers in the Basic Computer
COMMON BUS SYSTEM
EXPLANATION

S2S1S0: Selects the register/memory that would use the bus. Example
if S2S1S0= 011 (decimal equivalent =3) , 16-bit outputs of DR are
placed on the bus.
LD (load): When enabled, the particular register receives the data
from the bus during the next clock pulse transition.
The memory receives the contents of the bus when its write input is
activated.
The memory places its content onto bus when read input is
activated.
E (extended AC bit): flip-flop holds the carry
DR, AC, IR, and TR: have 16 bits each
AR and PC: have 12 bits each and they hold a memory address.
When the contents of these are applied to bus, the four most
significant nits are set to 0’s.
When AR or PC receives information from the bus, only the 12 least
significant bits are transferred into the register.
INPR: Receives a character from the input device (keyboard,…etc)
which is then transferred to AC.
OUTR: Receives a character from AC and delivers it to an output
device (say a Monitor).
16 lines of common bus receive information from six registers and
memory unit.
Five registers have three control inputs: LD (load), INR
(increment), and CLR (clear).
Memory address-
The input data and output data of the memory are connected to the
common bus, but the memory address is connected to AR.
Therefore, AR must always be used to specify a memory address.
By using a single register for the address, we eliminate the need for
an address bus that would have been needed otherwise.

Register Memory: Write operation

Memory Register: Read operation (note that AC cannot directly
read from memory!!)
CONTD…
Note that the content of any register can be applied onto the bus and
an operation can be performed in the adder and logic circuit during
the same clock cycle.
The transition at the end of the cycle transfers the content of the bus
into the destination register, and the output of the adder and logic
circuit into the AC
For example, the two microoperations
DR←AC and AC←DR (Exchange)
can be executed at the same time
This is done by:
⚫ place the contents of AC on the bus (S2S1S0=100)
⚫ enabling the LD (load) input of DR
⚫ transferring the contents of the DR through the adder and logic circuit
into AC
⚫ enabling the LD (load) input of AC
All during the same clock cycle.
COMPUTER INSTRUCTIONS

The basic computer has three instruction formats as shown below:

The operation code part of the instruction contain three bits and the
remaining 13 bits depends on the operation code encountered.
A memory-reference instruction uses 12 bits to specify an address
and one bit to specify the addressing mode I.(=0 for direct & 1 for
indirect address).
The register reference instructions are recognized by the operation
code 111 with a 0 in the leftmost bit(15 bit) of an instruction.
An input-output instruction does not need a reference to memory
and is recognized by the operation code 111 with a 1 in the left-most
bit of instruction. The remaining 12-bits are used to specify the type
of input-output operation or test performed.
BASIC COMPUTER
INSTRUCTIONS

} Memory-reference
instructions

} Register-reference
instructions

Input-output
} instructions
INSTRUCTION CYCLE

A program is a sequence of instructions stored in memory.

The program is executed in the computer by going through a cycle
for each instruction.
Each instruction in turn is subdivided into a sequence of sub-cycles
or phases.
Each instruction cycle consists of the following phases:
⚫ Fetch an instruction from memory
⚫ Decode the instruction
⚫ Read the effective address from memory if the instruction has an
indirect address
⚫ Execute the instruction
This process continues indefinitely unless a HALT instruction is
encountered.
FETCH AND DECODE
Initially, the Program Counter (PC) is loaded with the address of the
first instruction in the program.
The sequence counter SC is cleared to 0.
After each clock pulse, SC is incremented by one, so that the timing
signals go through a sequence T0, T1, T2, and so on.
The micro-operations can be specified by the following RTL:

T0: AR←PC
T1: IR←M[AR], PC←PC+1
T2: D0,…, D7←Decode IR(12-14), AR←IR(0-11), I←IR(15)
DETERMINE THE TYPE OF INSTRUCTION
The timing signal that is active after decoding is T3. During T3 the control
unit determines the type of instruction that was just read from memory.
Following diagram shows how instruction type is decoded.