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DEM unit 5

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0% found this document useful (0 votes)
6 views

DEM unit 5

Uploaded by

presonaluses
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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LOGIC FAMILY & CIRCUIT

Combinational Circuits
 Combinational circuit is a circuit in which we combine the different logic gates in the circuit.
 Example adder, Subtractor, encoder, decoder, multiplexer and demultiplexer etc.

Some of the characteristics of combinational circuits are following :


 The combinational circuit do not use any memory.
 The output of combinational circuit at any instant of time, depends only on the present at input.
 The previous state of input does not have any effect on the present state of the circuit.
 A combinational circuit can have an n number of inputs and m number of outputs.

Block diagram
LOGIC FAMILY & CIRCUIT

Block diagram
LOGIC FAMILY & CIRCUIT

Half Adder
 Half adder is a combinational circuit with two inputs and two outputs.
 This circuit has two outputs sum and carry.
 It does not take any carry.
 It is designed to add two single bit binary numbers.

Truth Table

Circuit Diagram

Logical Expression :
Sum = A XOR B = A ⊕ B
Carry = A AND B = AB
LOGIC FAMILY & CIRCUIT

Full Adder
 Full adder is developed to overcome the drawback of Half Adder. Truth Table

 It can add two one-bit numbers, and carry.


 The full adder is a three input and two output combinational circuit.
Block diagram

Circuit Diagram

Logical Expression :
SUM = (A XOR B) XOR Cin = (A ⊕ B) ⊕ Cin
CARRY-OUT = A.B + Cin(A ⊕ B)
= AB + BC + AC
LOGIC FAMILY & CIRCUIT

Half Subtractors
 Half subtractor is a combination circuit with two inputs and two outputs (difference and borrow).
 It produces the difference between the two binary bits and an output (Borrow).
 In the subtraction (A-B), A is called as Minuend bit and B is called as Subtrahend bit.

Truth Table

Circuit Diagram

(A ⊕ B)

Logical Expression
AB Difference = A XOR B
Borrow = AB
LOGIC FAMILY & CIRCUIT

Full Subtractors
 The disadvantage of a half subtractor is overcome by full subtractor.
 The full subtractor is a combinational circuit with three inputs and two output Diff. and Borrow'.
Circuit Diagram

Truth Table

DIFFERENCE = (A ⊕ B) ⊕ Cin

BORROW = AB + ABin + BBin


LOGIC FAMILY & CIRCUIT

Multiplexer
 A multiplexer is a combinational circuit.
 it has 2n input lines and a single output line.
 Simply, the multiplexer is a multi-input and single-output combinational circuit.
 It is also known as data selector.
 A multiplexer is also treated as Mux.
LOGIC FAMILY & CIRCUIT

2×1 Multiplexer:
 In 2×1 multiplexer, there are only two inputs, i.e., A0 and A1, 1 selection line, i.e., S0 and single
outputs, i.e., Y.
 On the basis of the combination of inputs which are present at the selection line S0, one of these 2
inputs will be connected to the output.
 The block diagram and the truth table of the 2×1 multiplexer are given below.

Y=S0'.A0+S0.A1
LOGIC FAMILY & CIRCUIT

4×1 Multiplexer:
 In the 4×1 multiplexer, there is a total of four inputs, i.e., A0, A1, A2, and A3, 2 selection lines, i.e., S0 and
S1 and single output, i.e., Y.
 On the basis of the combination of inputs that are present at the selection lines S0 and S1, one of these 4
inputs are connected to the output.
 The block diagram and the truth table of the 4×1 multiplexer are given below.

Y=S1' S0' A0 + S1' S0 A1 + S1 S0' A2 + S1 S0 A3


LOGIC FAMILY & CIRCUIT

De-multiplexer
 A De-multiplexer is a combinational circuit.
 It has only 1 input line and 2N output lines.
 Simply, the multiplexer is a single-input and multi-output combinational circuit.
 De-multiplexer is opposite to the multiplexer.
 It is also known as data distributor.
 De-multiplexer is also treated as De-mux.
LOGIC FAMILY & CIRCUIT

1×2 De-multiplexer:
 In the 1 to 2 De-multiplexer, there are only two outputs, i.e., Y0, and Y1, 1 selection lines, i.e.,
S0, and single input, i.e., A.
 On the basis of the selection value, the input will be connected to one of the outputs.
 The block diagram and the truth table of the 1×2 multiplexer are given below.

Y0 = S0'.A
Y1 = S0.A

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