Analog_electronics_DPP
Analog_electronics_DPP
EC/EE/IN Hinglish
PRACTICE SHEET 01
Subject : Analog Electronics
Chapter : Basic Introduction to electronics
And Diode Circuits
1. The input Impedance and output Impedance of Current 8. If the voltage Amplifier has Rin = 3 kΩ,
Amplifier is AI = 100, R = 10 kΩ
(a) Low, Low (b) High, High
(c) Low, High (d) High, Low Current
Vo
Find
Is
13. Consider the given circuit and a waveform for the input
Vo voltage. The diode in circuit has cutin voltage V = 0.
Find .
Vs
2
(c)
20. For the circuit shown below the value of v and i are (if Common Data For Q.23 to 25 :
the diode is ideal) The diodes in the given circuit have linear parameter of V
= 0.6 V and rf = 0
21. The diode circuit in figure shown below the biasing of 24. If v1 = 10 V and v2 = 5 V, then v0 is ______ volts.
the diode D1, D2 is
25. If v1 = v2 = 0, then output voltage v0 is ______ volts.
22. Consider the given a circuit and a waveform for the 26. The value of the DC output voltage (Vo, dc) is ______
input voltage. volts.
(a) (b)
30. The transformer utilization factor (TUF) is defined as 35. The output voltage V0 is
Pdc P
(a) (b) dc
Pac rated Pac
I rms Im
(c) (d)
I dc I dc
38. In the voltage regulator circuit shown in figure, the 42. The Q-point for the zener diode in figure is,
value of Rs and maximum power dissipation across
zener diode respectively. (Consider zener diode as
ideal).
45. A 5 V zener diode voltage regulator circuit is as shown (c) Transmit that part of sine wave, which lies above
in figure operates from a source that varies from 10 to – 4 V and below + 8 V.
14 V. The load current varies from 0 to 10 mA. The (d) Transmit that part of sine wave, which lies below
value of the series resistance so that the minimum + 4 V and above – 8 V.
magnitude of the zener diode current is 5 mA, is
48. Consider the circuit shown in the figure, assume that
the diodes are ideal. The breakdown voltage of zener
diode is shown in circuit. The transfer characteristic of
circuit is
50. For the circuit shown is the assume ideal diodes with 51. A dc current of 26 A flows through the circuit
zero forward resistance and zero forward voltage drop. shown. The diode in the circuit is forward biased and it
The current through the diode D2 in mA is has an ideality factor of one. At the quiescent point, the
___________. diode has a junction capacitance of 0.5 nF. Its neutral
region resistances can be neglected. Assume that the
room temperature thermal equivalent voltage is 26 mV.
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if
EC/EE/IN Hinglish
PRACTICE SHEET 02
Subject : Analog Electronics
Chapter : Diode Circuits and BJT Circuits
1. The diodes and capacitors in the circuit shown are 4. In a half-wave rectifier, if an a.c. supply is 60 Hz, then
ideal. The voltage v(t) across diode D1 is what is the a.c. ripple frequency at output?
(a) 30 Hz (b) 60 Hz
(c) 120 Hz (d) 15 Hz
5. A half-wave rectifier having a resistance load of 1 k
rectifies an a.c. voltage of 325 V peak value and the
diode has a forward resistance of 100 . What is the
RMS value of the current?
(a) 295.4 mA (b) 94.0 mA
(a) cost – 1 (b) sint
(c) 147.7 mA (d) 208.0 mA
(c) 1 – cost (d) 1 – sint 6. In a centre tap full wave rectifier, 100 V is the peak
2. Using small signal analysis calculate vd (ac). Assume voltage between the centre tap and one end of the
VD,ON = 0.7 V. secondary. What is the maximum voltage across the
reverse biased diode?
(a) 200 V (b) 141 V
(c) 100 V (d) 86 V
7. In the figure, D1 is a real silicon pn junction diode with
a drop of 0.7 V under forward bias condition and D2
is a Zener diode with breakdown voltage of –6.8 V.
The input Vin(t) is a periodic square wave of period T,
whose one period is shown in the figure.
8. For the Zener diode shown in the figure, the Zener 11. In the figure shown below we know the input and
voltage at knee is 7 V, the knee current is negligible output waveform of the circuit
and the Zener dynamic resistance is 10 . If the input
voltage Vi range from 10 V to 16 V, the output voltage
Vo ranges from
(a)
(a) 7.00 to 7.29 V (b) 7.14 to 7.29 V
(c) 7.14 to 7.43 V (d) 7.29 to 7.43 V
9. In the circuit shown. Vs is a 10 V square wave of
period, T = 4 ms with R = 500 and C = 10 F. The
capacitor is initially uncharged at t = 0, and the diode
is assumed to be ideal. The voltage across the (b)
capacitor (Vc) at 3 ms is equal to _____ volts (rounded
off to one decimal place).
(c)
10. Select the correct output (Vo) wave shape for a given
input (Vi) in the clamping network given below: (d)
(a) (b)
(c) (d)
3
t t
–5
(a) –10 (b)
vo vo
20 20
5
(c) t (d) t
vi ~ 10 k vo
t
– –5
vo
18 vo
(a) (d)
10
t
vo 3.33
vi
22 –10 4.33 10
(b) 19. For the circuit shown below £ach diode has Vr = 0.7
V.
+10 V
t
vo 10 k
t D1 D2
(c) –3
vs vo
D3 D4 10 k
vo
10 k
t –10 V
The vo for −10 vs 10 V is
–7 `
vo
(a)
(d) 8.43
18. For the circuit shown below, let cut in voltage Vr = 0.7 vi
–10 10
V.
–8.43
+
20 k 10 k
vi ~ vo
(b) vo
10 V 10 V
– 7.48
The plot of vo verses vi for −10 vi 10 V is
vo vi
(a) –10 10
9.3 –7.48
3.33
vi vo
–10 3.33 10 (c)
5.68
vo
(b)
9.3 vi
–10 –6.8 6.8 10
3.33 –5.68
vi vo
–10 4.03 10 (d)
vo 4.65
(c)
10 vi
–10 –4.65 4.65 10
3.33 4.65
vi
–10 3.33 10
5
20. For the circuit shown below the input voltage vi, is as (c) vo
shown in figure.
C 15
vi
+ 10 t
vi ~ R vo t
–15
– –10 (d) None of the above
Assume the RC time constant large and cutin voltage
of diode Vr = 0. The output voltage vo is 22. In the circuit I in DC current and capacitors are very
large. Using small signal model which of following is
(a) vo
correct?
10
t I C
Rs C1 2
(b) vo
20 +
vs vo
–
t VT
(a) vo = vs
vo VT + IRs
(c)
t
(b) vo = vs
–10 vs
(c) vo =
VT + IRs
(d) vs = 0
(d) vo
t
Common Data for Q. 23 and 24 :
The diode in the circuit shown below has the non linear
–20 terminal characteristics as shown in figure. Let the voltage
be vi = cost V.
21. For the circuit shown below the input voltage vi, is as 100 a iD (mA)
shown in figure.
iD
C vi ~ + 4
vi vD
+ 10
100
–
t 2V
vi ~ R vo vD (V)
5V 0.5 0.7
b
– –20
23. The current iD is
Assume the RC time constant large and cutin voltage (a) 2.5 (1 + cost) mA
of diode Vr = 0. The output voltage vo is (b) 5(0.5 + cost) mA
v
(a) 35 o (c) 5(1 + cost) mA
(d) 5(1 + 0.5cost) mA
5
t 24. The volage vD is
(a) 0.25(3 + cost) V
vo (b) 0.25(1 + 3 cost) V
(b)
(c) 0.5(3 + 1 cost) V
25
t
–5
6
(d) 0.5(2 + 3 cost) V 29. The equivalent circuit of a diode, during forward
biased and reverse biased conditions, are shown in the
Common Data for Q. 25 to 27 : figure.
(I) + – + –
In the voltage regulator circuit shown below the zener
diode current is to be limited to the range 5 ir 100 mA. (II) – +
10 k
12
iz iL
6.3 V
Vz = 4.8 V
Rz = 0 RL 10 sint ~ Vo 10 k
5V
25. The range of possible load current is If such a diode is used in clipper circuit of figure given
(a) 5 iL 130 mA above, the output voltage Vo of the circuit will be
(b) 25 iL 120 mA
(a)
(c) 10 iL 110 mA
(d) None of the above
+5 V
2
26. The range of possible load resistance is t
(a) 60 RL 372 –5 V
(b) 60 RL
(c) 40 RL 2 (b)
(d) 40 RL 360
+5.7 V
30. The cut-in voltage of both Zener diode DZ and diode 33. In the voltage regulator circuit below rating of zener
D shown in figure is 0.7 V, while break-down voltage diode is given, then the range of values of vi, that will
of DZ is 3.3 V and reverse break-down voltage of D is
maintain the zener diode in the ‘ON’ state is
50 V. The other parameters can be assumed to be the
same as those of an ideal diode. The values of the peak Ri = 220
+
output voltage (Vo) are
1 k Vz = 20 V
vi RL 1.2 k
IzM = 60 mA
DZ
−
10 sint Vo 1 k
= 314 rad/sec D
(a) 16.87 < vi < 36.87 V
(b) 16.87 < vi < 23.67 V
(a) 3.8 V in the positive half cycle and 1.4 V in the
negative half cycle. (c) 23.67 < vi < 36.87 V
(b) 2 V in the positive half cycle and 5 V in the (d) None of the above
negative half cycle.
(c) 3.3 V in both positive and negative half cycles.
(d) 4 V in both positive and negative half cycle 34. Assume that the diode cut in voltage for the circuit
shown below is Vr = 0.7 V . Which of clamper circuit
31. The voltage regulator shown below, what are the perforin the function shown below ?
nominal and worst case values of zener diode current vi vo
if the power supply voltage, zener break down voltage
10 V
and register all have 5 % tolerance? 2.7 V
+ + t
Rs = 15 k t vi Clamper vo
− −
−10 V −17.3 V
+ Vz = 9 V RL 10 k
vs = 30 V −
Rz = 0 V
C
+ +
I znom I znom I zworst
(min) D
vi − vo
(a) 1.2 mA 0 mA 0 mA 2V
− + −
(b) 0.5 mA 0.70 mA 0.103 mA (a)
(c) 0.5 mA 0.60 mA 0.346 mA C
(d) 0.5 mA 0.796 mA 0.215 mA + +
D
vi + vo
32. The diode in the circuit shown below have linear − 2V
parameter of Vr = 0.7 (for Si), Vr = 0.3 (for Ge) and rf − −
(b)
= 0 for both the diode. What is the biasing condition C
of diode D1 and D2? + +
+15 V D
vi − vo
2V
− + −
Si D1 D2 Ge (c)
+ −
+ +
D 2V
vo
vi C vo
50 k
− −
(d)
Plot vo versus vi is
36. The maximum value of load current over which the
Zener diode is in ON state.
(a) vo
(a) 36.88 mA (b) 35.88 mA
(c) 36.36 mA (d) 35.36 mA 1.8 V
vin
−10 V 1.8 V
37. The value of RL (Load resistance) corresponding to
maximum load current is −10 V
(c) vo
38. The new value of reference voltage and the
10 V
temperature coefficient series combination of diode D
and zener diode. −10 V 10 V vin
R
V = 10 V Vrof
−10 V
D Vr
V1
vo
(d)
(a) 6.9 V, −0.008%/°C
(b) 6.9 V, −0.0289%/°C
(c) 6.9 V, −0.056%/°C vin
Common Data for Q.41 and 42 : 46. Consider the circuit shown in figure. If the of the
In the circuit shown below VZ = − 1 V transistor is 30 and ICBO is 20 mA and the input voltage
+3 V is +5 V, the transistor would be operating in
+12 V
2.2 k
500 k 15 k
4.8 k Vi Q
−3 V 10 k
41. The value of is
−12 V
(a) 103.4 (b) 135.4 (a) saturation region
(c) 134.5 (d) 102.4 (b) active region
(c) breakdown region
42. The value of VCE is (d) cut-off region
(a) 6.4 V (b) 4.7 V
(c) 1.3 V (d) 4.2 V 47. The cutin voltage for each diode in circuit shown
below is Vγ = 0.6 V . Each diode current is 0.5 mA.
Common Data for Q.43 to 45 :
The value of R3 will be ___________ k
For the transistor shown below = 150.
+ 10 V
+5 V
5 k
Vo
R1
+5 V
IQ R2
0V
−5 V
R3
43. If IQ = 0.1 mA, the value of Vo is
(a) 1.4 V (b) 4.5 V -5 V
(c) 3.2 V (d) None of these
49. The secondary transformer voltage of the rectifier Common Data for Q.50 and 51 :
circuit shown below is Vs = 60sin 260t V. Each The circuit shown has R = 100, RC = 2 k RL = 2 k.
diode has a cut in voltage V = 0.7V . The ripple Also assume a constant diode voltage of 0.6 V and
capacitors are very large using the small signal model for
voltage is to be no more than υrip = 2V . The value of VC = 1.6 V.
filter capacitor will be __________ μF . VC
RC
C1 C2
+
+ + vo - R
vs 10 k +
vi +
vo( t) Rt
- vin(t) −
C −
-
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if
EC/EE/IN Hinglish
PRACTICE SHEET 01
Subject : Analog Electronics
Chapter : BJT Circuits
1. For the transistor shown = 25. The range of V1 such 3. For the circuit shown in figure given that
that 1.0 VCE 4.5 is IS = 8 × 10–16 A, = 100 and VBE = 0.8 V. What is the
operating point value?
(a) 0 A
(b) 10 A
(c) 100 A
(d) 1000 A
6. The value of VB is
(a) 26 mV Common Data For Q. 10 to 12:
(b) 809.6 mV For the circuit shown in Figure, IE = 1 mA, = 99 and
(c) 726 mV VBE = 0.7 V
(d) 0 mV
13. Consider the circuit shown in the figure below. Given Common Data For Q. 16 and 17
that saturation current I = 5 × 10–17 Amp, VBE = 800 For the circuit in Figure, = 100, VBE active = 0.7V
mV and = 100 (Vthermal = 26 mV)
Common Data For Q. 14 to 15 17. The value of VCEQ (Collector to Emitter voltage) is
Consider the transistor circuit shown below: (a) 7.51 V (b) 0.2 V
(c) –2.49 V (d) 3.65 V
Common Data For Q.23 and 24: 26. Ratio of voltage gain Ar1/Ar2 for the two circuit is
Consider the circuit shown below. The transistor (a) 2 (b) 0.5
parameter are β = 100 and Vi = ∞ (Vthermal = 25.9 mV) (c) 4 (d) 1
5
Common Data For Q.28 and 29: Common Data For Q. 32 and 33:
For the circuit shown below transistor parameters are Consider the common Base amplifier shown below.
β = 100, VBE (ON) = 0.7 V, VA = 80 V, (Vthermal = 26 The parameters are gm = 2 mS and ro = 250 k. Figure
mV) shows the Thevenin equivalent faced by load
resistance RL.
g m1 r2 g m 2 r2
(a) (b)
1 + g m 2 r2 1 + g m 2 r2
g m1 r1 g m1 r1
(c) (d)
g m 2 r 2 1 + g m 2 r2
6
35. The transistor parameters of Q1 and Q2 of circuit 39. For the circuit shown below,
shown in figure are (gm1, rπ1)
vo
The value of voltage gain Av = is
vi
The voltage gain |Av| of the following circuit is RC RC
(a) gm1, rπ1 (b) gm2, rπ1 (a) (b) −
1 g m1 + RE || r1 1 g m1 + RE || r 2
(c) gm1, rπ2 (d) gm2, rπ2
RC RC
(c) − (d) −
Common Data For Q. 36 to 39: 1 gm2 + RE || r 2 1 gm2 + RE || r1
For the circuit shown below, Vthermal = 26 mV,
VBE on = 0.7 V. Common Data For Q.40 and 41:
Consider the amplifier circuit shown below having
Vthermal = 25 mV.
o
36. The value of voltage gain Av = is
i
(a) – 3.85 (b) – 367.72
(c) – 2.99 (d) None of the above
40. What is value of collector current, IC and hybrid
io parameter, rπ respectively?
37. The value of current gain Ai = is
ii (a) 37.3 μA, 669
(a) –3.85 (b) 104.73 (b) 4.67 μA, 5.35
(c) 119.81 (d) None of the above (c) 1.13 mA, 5.35 k
(d) 4.67 mA, 669
38. The value of input impedance zi is
(a) 68.478 k 41. What are the values of C1 and C2 so that they can be
(b) 0.716 k neglected at a frequency of 50 Hz ?
(c) 1.278 k (a) 0.105 μF, 0.763 μF
(d) 59.76 k (b) 0.005 μF, 0.863 μF
(c) 0.505 μF, 0.663 μF
(d) 0.53 μF, 0.343 μF
7
Common Data For Q.42 to 43: 43. Thevenin equivalent resistance Rth is
Consider the amplifier circuit shown below the (a) 3.16 k (b) 70.68 k
parameter are gm = 2, β = 100, r0 = 250 k. Figure (c) 2.67 k (d) None of the above
shows the Thevenin equivalent faced by load RL.
44. In the single - stage transistor amplifier circuit shown
in Figure, the capacitor CE is removed. Then, the ac
small - signal mid - band voltage gain of the
amplifier
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if
EC/EE/IN Hinglish
PRACTICE SHEET 01
Subject : Analog Electronics
Chapter : MOSFET
1. In the following circuit, transistors Q1 and Q2 has
following parameters:
W W
20
L 1 L 2
VTH 1 VTH 2 1V
k 'n 1 k 'n 2 100A / V 2
+ 5V + 5V
V1 V2
ID
R2
8
ID (Drain current) (mA)
4
A
2
VT = 0.2 V
2 3 4 1 5
The value of Q-Point (VDSQ, IDQ) is VGS (Gate to source voltage) Volts
(a) 8.77 V, 89.7 A (a) 3.488 mA, 2 mS (b) 1.724 mA, 2.5 mS
(b) 1.599 V, 89.7 A (c) 1.7725 mS, 2 mS (d) 3.488 mA, 2.5 mS
(c) 8.77 V, 143.7 A
16. For an n-channel MOSFET biased in the saturation
(d) 6.82 V, 143.7 A
region, the parameters are Kn = 0.5 mA/V2, VTN = 0.8
Common Data For Q. 13 & 14 : V, = 0.01 V–1, and IDQ = 0.75 mA. The value of gm
Consider the circuit shown in figure below, the transistor and r0 are
parameters are as follows: (a) 0.68 mS, 603 kΩ (b) 1.22 mS, 603 kΩ
Kn = 0.445 mA/V2 (c) 1.22 mS, 133 kΩ (d) 0.68 mS, 133 kΩ
VTN = 0.2 V
4
17. An NMOS amplifier with depletion load (ML) is 20. The amplifier input resistance is
shown in figure. Parameters for transistors MD and ML (a) 20.6 kΩ (b) 7.9 kΩ
are VTHD = + 0.8 V, KnD = 1 mA/V2, D = 0.01 V–1 (c) 29.1 kΩ (d) 104 kΩ
VTHL = –1.5 V, KnL = 0.2 mA/V2 and L = 0.01 V–1.
Common data for Q.21 to 23 :
A depletion NMOS transistor circuit is shown in figure
21. Trans-conductance gm is
If the transistors are biased at iD = 0.2 mA, then small (a) 5 mA/V
signal voltage gain Av is (b) 3.33 mA/V
(a) –224 (b) –111.75 (c) 10 mA/V
(c) 894 (d) –894 (d) 6.81 mA/V
24. Small signal transconductance is Common data for Q.30 and 31:
(a) 29.52 mA/V (b) 59.04 mA/V Consider the source-follower circuit shown below. The
(c) 11.3 mA/V (d) 5.65 mA/V value of parameter are gm = 2 mS and r0 = 100 kΩ.
v0
25. The small signal voltage gain Av = is
vs
(a) 1.20 (b) 0.86
(c) 1.13 (d) 0.98
27. Consider the NMOS common-gate circuit shown 30. The voltage gain Av is
below. The parameters are gm = 2 mS and r0 = . The (a) 0.89 (b) –0.89
voltage gain Av is (c) 2.79 (d) –2.79
33. The value of transconductance gm1 and gm2 for MOS Common data for Q.37 to 40:
M1 and MOS M2 are respectively Consider a source follower circuit shown in figure below.
(a) 1.14 mA/V, 0.565 mA/V Transistor has the parameters as follows:
(b) 0.56 mA/V, 0.565 mA/V Kp = 2mA/V2, VTP = – 2V and = 0.02 V–1
(c) 0.64 mA/V, 0.64 mA/V
(d) 1.14 mA/V, 1.14 mA/V
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if
EC/EE/IN Hinglish
PRACTICE SHEET 01
Subject : Analog Electronics
OP-AMP
1. Consider an ideal op-amp circuit shown in the figure,
with a closed loop voltage gain Av = 5 and output range
–10 V vo 10 V. If the maximum current in any
resistor is limited to 50 A, then R1 and R2 are
R2 1
(a)
R1 1 R2
1 1
Aol R1
5. The output voltage vo is
(a) –12 V (b) 12 V Aol
(b)
Aol
(c) –18 V (d) 18 V 1
R2
1
6. Input impedance seen by the voltage source is R1
vo
7. Voltage gain Ao is
v1 v2
10. The ideal closed-loop voltage gain is
(a) 10 (b) –11 (a) 1 (b) –1
(c) –10 (d) 11 (c) (d) 50
8. Input impedance seen at terminal v2 is 11. If open-loop gain is Aod = 999, then closed-loop gain
110
(a) k (b) 110 k is
11 (a) –0.999 (b) 0.999
(c) 100 k (d) 10 k (c) 1.001 (d) –1.001
9. Consider an ideal op-amp circuit shown in following 12. For the op-amp shown below open loop differential
figure. If open loop gain of op-amp is Aol, then closed gain is Aod = 103. The output voltage vo for vi = 2 V is
loop voltage gain Av is
3
27. For the circuit above in figure, op-amp has an open (a) 0° (b) –90°
loop 3-dB bandwidth of o, closed loop 3-dB (c) +90° (d) 180°
bandwidth is
30. For the circuit shown below, the value of output
voltage, vo is
(a) 1 Aol
R2
o
1
R1
A
(b) ol o
1 R2
R1
R2
(c) 1 o
R1
(a) vo = 10vi1 + 5va
o R2
(d) 1 (b) vo = 5vi1 + 10va
1 Aol R1
(c) vo = vi1 + va
(d) vo = 15(va – vi1)
28. Consider the inverting amplifier, using an ideal
operational amplifier shown in the figure. The
6
(a)
vin
(c) (d) None of the above
RL
(d)
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if
EC/EE/IN Hinglish
PRACTICE SHEET-01
Analog Electronics
Feedback Amplifier and Oscillators
1. A negative feedback amplifier has a closed loop gain 4. A compound transconductance amplifier is to be
of Af = 80 and an open loop gain of A = 105. If the open designed by connecting two basic feedback amplifier
loop gain decreases by 20% then the percent change in cascade. Which of two amplifier should be
in the closed loop gain and new value of close loop connected in cascade to form the compound
gain Af will be respectively transconductance amplifier?
(a) 0.016%, 80.01 (a)
(b) –0.016%, 79.99 (b)
(c) 0.004%, 79.68
(c)
(d) –0.004, 80.32
(d) (b) and (c)
2. A feedback amplifier shown in figure
5. Consider the current to voltage convertor circuit
shown below
6. Consider the circuit shown below. 9. Consider the amplifier circuit shown below.
o
11. What is the trans resistance transfer function Aif =
is
The type of amplifier circuit is
(a) Series-series (b) Series-shunt (a) 59.7 (b) –8.75 k
(c) Shunt-series (d) Shunt-shunt (c) –59.7 k (d) 8.75 k
3
Common Data for Q.18 to 19: Common Data for Q.22 to 23:
Consider the circuit shown below. Consider the oscillator circuit shown below.
25. Consider the modified astable multivibrator shown 28. A relaxation oscillator is made using Op-amp as
below. shown in figure. The supply voltages of the Op-amps
are 12V. The voltage waveform at point P will be
(d)
Common Data for Q.29 to 30: Common Data for Q.32 to 33:
The following network is used as a feedback circuit in an Consider the Wien-bridge oscillator shown in figure
oscillator shown in figure to generate sinusoidal below.
oscillations. Assuming that the operation amplifier is ideal.
Given that R = 10 k and C = 100 pF.
31. Value of RF is
(a) 1 k (b) 4 k For sustained oscillation, the value of R2/R1 must be
(c) 2 k (d) 8 k equal to
(a) 2 (b) 0.5
(c) 3 (d) 1
7
37. For the following phase-shift oscillator, frequency of 40. What is the frequency of oscillation (in kHz)?
oscillation is nearly equal to ______ kHz.
41. The required value of R2 for the oscillation is
________ k.
Common Data for Q.43 and 44: 45. Consider the Colpitts oscillator circuit shown in figure
Consider the phase shift oscillator shown in figure with below with parameters L = 1 H, C1 = 1 nF, C2 = 1 nF,
parameter C = 100 pF, R = 10 k. R = 4 k. What is the oscillation frequency (in MHz)
44. The required value of R2 for the oscillation is 46. For the Hartely oscillator shown in figure, what is the
_________ kHz. value of oscillation frequency (in kHz)?
Any issue with Practice Sheet, please report by clicking here:- https://forms.gle/t2SzQVvQcs638c4r5
For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if