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Chapter 3.2 Addresing Modes of i8086

Chapter 3.2 discusses addressing modes and instruction formats in the i8086 microprocessor, detailing how data and operands are located and accessed. It covers 12 basic addressing modes categorized into groups such as immediate, register, memory, I/O, and relative addressing modes, explaining their functions and examples. The chapter emphasizes the MOV instruction as a primary example for illustrating these addressing modes and their applications in data transfer operations.

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0% found this document useful (0 votes)
9 views

Chapter 3.2 Addresing Modes of i8086

Chapter 3.2 discusses addressing modes and instruction formats in the i8086 microprocessor, detailing how data and operands are located and accessed. It covers 12 basic addressing modes categorized into groups such as immediate, register, memory, I/O, and relative addressing modes, explaining their functions and examples. The chapter emphasizes the MOV instruction as a primary example for illustrating these addressing modes and their applications in data transfer operations.

Uploaded by

rohobotkolaso787
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CHAPTER 3.

2
Addressing modes and Instruction format in i8086
 Addressing modes
 Instruction format with addressing modes
 Physical address calculation with addressing modes

4/1/2025 by eng A4k 1


ADDRESSING MODES IN
i8086

4/1/2025 By Eng A4K 2


• Addressing mode indicates a way of locating data/operands or the manner in which a
microprocessor specifies the address of the operands in an instruction .
• That means, addressing modes describe the types of operands and the way they are accessed for
executing an instruction.
• In this chapter, MOV (move data) instruction is used to describe all the addressing modes.
• Since the MOV instruction is common and flexible , it provides a basis for the explanation of the
addressing modes.
• The MOV instruction transfers bytes/words of data between registers or between memory &
registers in the 8086 through 80286.
• MOV instruction always copies the source data and into the destination .
• Also, note that the flag registers remain un-affected by most data transfer instructions.
• Notice that a comma always separates the destination operand from the source in an instruction.
• When 8086 executes an instruction, it performs the specified function on the operands.
• These operands may reside in one of the internal registers of the microprocessor be stored at an
address in memory be a part of the instruction

4/1/2025 By Eng A4K 3


• 8086 has 12 basic addressing modes
• Can be classified into 6 groups.
i. Addressing Modes for accessing Immediate data (Immediate Modes)
ii. Addressing Modes for accessing Register Data (Register Modes)
iii. Implied Addressing Mode.
iv. Addressing Modes for accessing Data in Memory (Memory Modes)
v. Addressing Mode for accessing I/O Ports (I/O Modes)
vi. Relative Addressing Mode.(Displacement)
Immediate Addressing Mode
• In immediate mode, 8 or 16 bit data can be specified as part of the instruction.
E.g: MOV CL,03H (which moves 8 bit data into CL)
E.g: MOV DX,0502H (which moves 16 bit data 0502H into DX)
E.g: MOV BH, ‘A’ (moves an ASCII hex-code of A (41H)into BH)
• In the above MOV instructions , the destination operand is in register mode.
• Even though the immediate mode specifies data with the instruction, these immediate data must
be located in the memory addressed by the 8086 CS and IP registers. This is because these data are
considered as part of the instruction. A constant such as “VALUE” can be defined by the assembler
EQU (means EQUATE) directive such as VALUE EQU 35H. An 8086 instruction with immediate
mode such as MOV BH, VALUE can then be used to load 35H into BH. So, VALUE EQU 35 MOV
BH , VALUE is also in immediate addressing mode.

4/1/2025 By Eng A4K 4


Register Addressing Mode

• Register addressing mode is the most common form of data addressing .


• This mode specifies the source operand, destination operand or both to be contained in an 8086
register.
• In this mode, data is stored in a register and is referred by a particular register. All the registers except
IP, may be used in this mode.
E.g: MOV DX,CX moves the 16 bit contents of CX into DX.
• (Here both source and destination operands are in register mode)
E.g: MOV CL,DL moves 8 bit contents of DL into CL
• MOV BH,CX is an illegal instruction.
• (The register size must be same for a MOV instruction)
• The instruction MOV BX,CX will copy the contents of CX into BX register. Also this will erase the old
contents of register BX, but the contents of CX will remain unchanged.
• The contents of the destination register or destination memory location will change for all type of
MOV instructions except the CMP and TEST instructions.
• Segment register - to - Segment register, MOV instruction is not allowed.

4/1/2025 By Eng A4K 5


Addressing Modes For Accessing Data In Memory
(Memory Modes)
• EU must use BIU in order to access memory operands since EU cannot access memory
operands directly.
• For e.g.: when the EU needs to access a memory location (8086 must use a segment
register whenever it accesses the memory) it sends an offset value to the BIU. This
offset is called the Effective Address (EA).
• EA is the displacement of the desired location from the segment base.
• Then BIU will generate 20 bit physical address with the segment register by adding 16
bit EA to it.
• There are 6 modes in this category….
1. Direct Addressing Mode
2. Register Indirect Addressing Mode.
3. Based Address Mode.
4. Indexed Address Mode.
5. Based Indexed Address Mode.
6. String Address Mode

4/1/2025 By Eng A4K 6


1. Direct Addressing Mode

• Transfers data between a memory location and a register.


• In this mode, 16 bit EA is taken directly from the displacement field of the instruction.
• This EA or displacement is the distance of the memory location from the current value in
the data segment(DS) register in which the data are stored.
Consider MOV AX, [5000H]
• Here data resides in a memory location in the data segment, whose effective address is
computed using 5000H as the offset address and the content of DS as segment address.
The Physical address, here, is 10H* DS + 5000H
• Another example of 16 bit read from memory,
• Consider
START DW 0040H
MOV CX , START
• The above instruction (together) moves the contents of memory location which is offset by
START from the current DS value into CX
• In the instruction MOV CX , START - the source operand is in direct addressing mode.
• The 16 bit value can be assigned to the offset START by the using an assembler pseudo
instruction like DW [Define Word] or DB [Define Byte] as
• START DW 0040H.

4/1/2025 By Eng A4K 7


Suppose, DS = 3050H, START = 0040H then BIU generates the 20 bit physical address 30540H on
the 8086 address line and then initiates a memory read cycle to read the 16 bit data from memory
location starting at 30540H
The memory logic, places the contents of locations 30540H and 30541H on the 8086 data pins.
The contents of memory location 30540H to CL and the contents of memory location 30541H to
CH
An e.g. of 8 bit read from memory
START DW 0040H
MOV CH, START
If DS = 3050H and the value of START is 0040H then 8 bit content of memory location 30540H is
moved to register CH.
An e.g. of 16 bit write to memory
START DW 0040H
MOV START, BX
With DS =3050H. Value of START is 0040H, the MOV instruction moves the contents of BX to
location 30540H. (the content of BL to the location 30540H and the content of BH to the location
30541H )
An e.g. of 8 bit data write
START DW 0040H
MOV START , BL

4/1/2025 By Eng A4K 8


2. Register Indirect Addressing Mode

• In register indirect addressing, the offset address held in any of the following registers.
• The offset address can be either in BX, BP/SP, SI/DI
• The default segment is either DS/ES or SS.
• By default, the Data Segment (in register indirect addressing mode) uses BX, DI, or SI to
address memory.
• If BP addresses memory, the Stack Segment is used by default.
• Pointer registers or an index registers can also be used in this mode to specify the EA.
• The pointer register can be BP/SP or sometimes even base register (BX).
• Index register can be either source index (SI) register or destination index (DI) register.
Example MOV AX, [BX]
• In the above example, the source operand is in register indirect mode.
• Here the data is present in a memory location in DS whose offset address is in BX.
• The Physical address of the data is given as 10H*DS+BX

4/1/2025 By Eng A4K 9


• Another E.g: MOV [DI],BX
• The source operand is in register mode , while the destination operand is in register indirect
mode.
• The above instruction moves the 16 bit content of BX into a memory which is offset by the
value, specified in DI with the current DS.
• If DS=5004H and DI=0020H and BX=2456H,then after MOV [DI],BX .
• Content of BX (2456H) is moved to memory location 50060H . (50040H + 0020H = 50060H)
• ie, Content of BL to 50060H and the content of BH to 50061H
• In some cases, indirect addressing requires specifying the size of the data. For this purpose,
special assembler directives like BYTE PTR, WORD PTR are being used in an instruction. These
directives indicate the size of the memory data addressed by the memory pointer (PTR).
• For eg: MOV AL,[DI] is clearly a byte sized instruction
• But MOV [DI], 10H is an ambiguous one. The assembler cant determine the size of the 10H.
• The instruction MOV BYTE PTR [DI], 10H clearly designates the location addressed by DI as a
byte sized memory location.
• Likewise, MOV WORD PTR [DI],1020H clearly identifies the memory location as word sized
one.

4/1/2025 By Eng A4K 10


3.Based Addressing Mode

• In this mode, EA is obtained by adding a displacement value to the contents of


BX / BP.
• The segment registers used are DS and SS.
• When BX is used, the 20-bit physical address is computed from BX and DS.
• When BP is used, 20 bit physical address is computed from BP and SS.
Consider MOV AX , START[BX]
• The source operand in the above instruction is in based mode.
• The 20-bit physical address is computed from DS & EA.
• Offset address (EA)is obtained by adding the value of START and BX
• Consider the displacement START is 1000H. If BX contains the value 0100H and
DS=0200H, the Physical address will be 10H * DS+1100H
• The following diagram will depicts the transfer of 16-bit data to the register AX

4/1/2025 By Eng A4K 11


4. Indexed Addressing Mode

• In this mode, the effective address(EA) is calculated by adding the displacement and the contents of SI
or DI
Eg; MOV BH, START [SI]
• Moves the 8-bit contents of 20 bit address computed from the displacement (START, SI) and DS into
BH. The displacement (here it is START) is provided by the programmer using the assembler directive
EQU. Indexed addressing mode can be used to access a single table/array. The displacement can be the
starting address of the table/array.
• Then the contents of SI or DI can then be used as an index from the starting address to access a
particular element in the table.
• Consider the following code, with DS=1000H, where START specifies the displacement
START EQU 500H
MOV SI , 05H
MOV AL , START[SI]
MOV SI , 10H
MOV START[SI],AL
• can transfer the contents of array element in 05H into the array element in10H.

4/1/2025 By Eng A4K 12


5. Based Indexed Addressing Mode
• Least used addressing mode, since this mode is too complex for frequent use in a program.
• In this mode, the EA is computed by adding a base register/base pointer (BX or BP), an index
register (SI/DI) and a displacement
E.g. MOV ALPHA[SI][BX], CL
• If BX = 0200H, SI = 1000H , value of ALPHA = 08H,and DS = 3000H then 8-bit contents of CL is
moved to 20 bit physical address (DS+EA)

The 20 bit physical address Consider the instruction,


(DS+EA)=31208H, is calculated as below MOV AX , ALPHA [BX][SI]
EA 0200H + BX where ALPHA=100H, BX=0020H,
1000H + SI SI=0010H and DS=1000H
08H Displacement
---------------
1208H
Now, DS*10H + EA
30000H +
1208H
---------------
31208H

4/1/2025 By Eng A4K 13


6.String Addressing Mode

• This mode uses index registers SI and DI.


• The string instructions automatically assume SI to point to the first byte (or word) of the source operand
and DI to point the first byte (or word) of the destination operand.
• The contents of SI and DI are automatically incremented (by clearing DF to 0 using CLD instruction) or
decremented (by setting DF to 1 using STD instruction) to point to the next byte (or word). The segment
register for the source is DS and the segment register for the destination must be ES. E.g: Consider the
instruction MOVS BYTE.

• Case :- with CLD instruction. [DF = 0] (automatically increments the contents of SI and DI)
Suppose, DS = 4000H , ES = 2000H
SI = 0500H , DI = 0300H
DS + SI (source) --------- [40500H] = 38H
ES + DI (destination)---- [20300H] = 45H
• Then after the execution of MOVS BYTE, the location [20300H]=38H & SI= 0501H, DI=0301H (auto
incremented), the contents of other registers and memory locations are unchanged

4/1/2025 By Eng A4K 14


Relative Addressing Mode
• Instructions using this mode specify the operand as a signed 8 bit displacement
relative to IP/ PC.
Eg; JNC START (JNC – Jump if No Carry)
• This instruction specifies that if carry = 0, then PC is loaded with the current PC
contents plus the value of START; otherwise (if carry =1) the next instruction is
executed.
Implied Addressing Mode
• Instructions using this mode have no operand
E.g: CLC
• Clears the carry flag to zero.

4/1/2025 By Eng A4K 15


I/O modes
• Standard I/O uses port addressing modes. There are two types port addressing modes,
direct and indirect.
• In direct port mode, the port number is an 8-bit immediate operand.
For eg: OUT 05H , AL
• This will outputs content of AL to 8-bit port 05H
• In indirect port mode, port number is taken from DX.
For eg: IN AL, DX
• If DX= 5040H, the above instruction will input the 8-bit content of port 5040H into AL.
• On the other hand, IN AX, DX will input a 16-bit content from the port specified in DX
register.
• 8-bit and 16-bit I/O transfers must take place through AL and AX respectively
• Port number is assigned according to control register functional bit assignment.

4/1/2025 By Eng A4K 16

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