CHAPTER THREE

A D D R E S S IN G MODE

• Addressing Mode:- The way of specifying data to be

operated by an instruction.
• An addressing mode:- specifies how to calculate the effective
memory address of an operand by using information held in
registers and/or constants contained within a machine instruction
or elsewhere.

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Contents
Types of addressing:
1. Register Addressing
2. Immediate Addressing
3. Direct Addressing
4. Register Indirect Addressing
5. Based Addressing
6. Indexed addressing
7. Based Index Addressing
8. String addressing
9. I/O Direct & Indirect Addressing
10. Relative addressing
11. Implied Addressing
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Types of addressing mode
1. Register Addressing
• The ins truction w ill s p ecify the na m e of the register which
holds the data to be operated by the instruction.
Exam ple:
MOV CL, D H
Th e con tent of 8-b it r e g is ter D H is m ov ed to another 8-bit register CL

(CL) <-- (D H)

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2. Immediate Addressing
• In immediate a ddr es s i n g mode, a n 8-bit or 16-bit data is
specified a s part of the instruction
Exa m p le:
M O V DL, 0 8 H
T he 8-bit d a t a (0 8 H ) g i v e n in the instruction i s
m o v e d to D L

(D L)  08 H
M O V AX, 0 A 9 F H

The 16-bit d a t a (0A9F H ) g i ven in the instruction

is m o v e d to A X register

(AX)  0A9F H

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2 0 A d d r e s s buses ⟶ 8086 can address up
t o 2 = 1 M b y t e s of m e m o r y
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However, t he l a r g e s t re g i s t e r is o n l y 1 6 b i t s
P h y s ic a l A d d r e s s will h a v e t o b e calculated P h y s i c a l
A d d r e s s : Ac t u a l a d d r e s s of a b y t e in memory. i.e.
t he v a l u e which g o e s o u t o n t o t he a d d r e s s b u s .

M e m o r y A d d r e s s represen ted in the form –

S e g : Offset ( E g - 89AB:F012)
E a c h time the pr o c es sor w a n t s to a c c e s s
memory, it t a k e s the con ten t s of a s e g m e n t
register, shifts it o n e hexadeci mal place to the
left ( s a m e a s multiplying b y 16 1 0 ), then a d d the 1 6 bytes of
contiguous memory
required offset to form the 20- bit a d d r e s s

8 9 A B : F 0 1 2 ⟶ 8 9 A B ⟶ 8 9 A B 0 ( Pa ra g ra p h to b y t e ⟶ 8 9 A B x 1 0 = 8 9 A B 0 )
F012 ⟶ 0F012 (Offset i s a l r e a d y in b y t e unit)
+ -------
98AC2 (The a b s o l u t e
address)

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General Rules for Segment: Offset Values
CS:Ip
DS:BX,SI
SS:SP,BP
ES:BX,DI,SI

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Problems on physical address calculation in 8086 Microprocessor

1. The value of Code Segment (CS) Register is 4042H and the value of
different offsets is as follows:
BX: 2025H , IP: 0580H , DI: 4247H
Calculate the effective address of the memory location pointed by the CS
register.
Effective address= Base address of CS register X 10 H + Address of IP
= 4042H X 10H + 0580H
= (40420 + 0580)H
= 41000H/409A0h
2. Calculate the effective address for the following register:
SS: 3860H, SP: 1735H, BP: 4826H

(SS X 10H) + SP = 3640H X 10H + 1735H

= 36400H + 1735H
= 38135H
(SS X 10H) + BP = 3640H X 10H + 4826H
= 36400H + 4826H
= 41226H
3. DS: 3056H, IP: 1023H, BP: 2322H and SP: 3029H
Can you calculate the effective address of the memory location as per the DS
register?
Ans:No 7
3. Direct Addressing
• Here, the effective a ddr es s of the memory location at which
the data operand is stored is given in the instruction.
• The effective address is just a 16-bit number written
directly in the instruction.

Exam ple:
M O V BX, [1354H]
M O V BL, [0400H]
• The square brackets around the 1354 H denotes
the contents of the m e m ory location. W h e n executed, this
instruction will copy the contents of the m em ory location into
B X register.
• This a d d re s s i n g m od e is called direct because the
displacement of the operand from the s e g m e n t b a s e is
specified directly in the instruction.

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4. Register Indirect Addressing
• In R e g is ter ind irect a d d re s s ing , n a m e of the register which h olds the
effective a d d r e s s (EA) will be specified in the instruction.

Registers u s e d to hold EA are any of the

following registers:

BX, BP, DI and SI.

• Content of the D S reg ister is us ed for b a s e
a d d re s s calculation.

Exa m p le:
Note : Register/ memory
M O V CX, [BX]
enclosed in brackets refer to
O p era tion s : content of register/ memory
EA = (BX)
B A = ( D S ) x 16 1 0
M A = BA + EA

(CX) ( M A ) or,

(C L)  (M A )
(CH)  ( M A + 1 )
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5. Based Addressing
• In B a s e d Addressing, B X or B P is u s ed to hold the b a s e value
for effective a ddr es s a n d a s i gn ed 8- bit or unsigned 16-bit
displacement will be specified in the instruction.

• In case of 8-bit displacement, it is s i g n

extended to 16-bit before a d d i n g to the
b a s e value.
• W he n B X h ol d s th e b a s e va lu e of EA,
2 0 -b i t p h y s i ca l a d d re s s i s ca lcu la te d from
B X a nd D S . W h e n B P h old s th e b a s e va l u e
of EA, B P a n d S S i s u s e d .
Exam ple:
MOV AX, [BX + 08H]
Operations:
0008 H  08 H (Si gn extended)
EA = (BX) + 0008 H
(AL)  ( M A)
B A = ( D S ) x 16 1 0
(AH )  ( M A + 1)
M A = B A + EA
(AX)  ( M A ) or,

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6. Indexed Addressing
• SI or DI register is used to hold an index value for
memory data and a signed 8-bit or unsigned 16- bit
displacement will be specified in the instruction.
• Displacement is a d d e d to the index value
in S I or D I register to obtain the EA.
• In case of 8-bit displacement, it is s i g n
extended to 16-bit before a d d i n g to the
b a s e value.
Exa m p le:
M O V CX, [SI + 0A2H]
Operations:
FFA2 H  A2 H ( S ig n extended)

EA = (SI) + FFA2 H
BA = (DS)x 16 1 0
M A = BA + EA
(CX)  (MA) or,
(CL)  ( M A)
(CH )  ( M A+ 1)
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7. Based Index Addressing
• In B a s e d Index Addressing, the effective a d d re s s is computed
from the s u m of a b a s e register ( B x o r B P ) , a n i n d e x r e g i s t e r
(S I or D I) a nd a d i s p l a c e m e n t .

Exam ple:
M O V DX, [BX + SI + 0AH]
Operations:
000A H  0A H (S ig n extended)
EA = (BX) + (SI) + 000A H
B A = ( D S ) x 16 1 0
M A = B A + EA
(D X )  (M A ) or,
(D L)  (M A )
(D H )  (M A + 1)

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8. String Addressing
• Em p loyed in s tring op erations to op erate on string data.
• The effective a d d re s s (EA) of source d ata is stored in S I register
a n d the EA of destination is stored in D I register.
• S e g m e n t register for calculating b a s e a d d re s s of source data is
D S a n d that of the destination d ata is E S
Example: M O V S BYTE
Operations:
Calculation of source memory location:
EA = (SI) B A = (DS) x 16 1 0 M A = B A + EA

Calculation of destination memory location:

EA E = (DI) BA E = (ES) x 16 1 0 M A E = BA E + EA E
(M A E )  (M A )
Note : Effective address
If D F = 1, then ( S I ) ( S I ) – 1 a n d (DI) = (DI) - 1
of the Extra segment
If D F = 0, then ( S I ) ( S I ) + 1 a n d (DI) = (DI) + 1
register

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9. I/O Direct & Indirect Addressing
• These a ddr es s i n g m o d e s are u s ed to access data from
standard I/O m a p p e d dev ices or ports.
• In d irect p ort a d d ress ing m od e, a n 8-b it p ort a ddres s is
directly specified in the instruction.
Example: I N AL, [09H]
Operations: PORT a d d r
= 09 H
(A L)  (P O RT)
• Content of port with address 09 H is moved to AL register
• In indirect port addressing mode, the instruction will
specify the name of the register which holds the port
address. In 8086, the 16-bit port address is stored in the D X
register.
Example: O UT [DX], A X

Operations: PORT a d d r = ( D X )
(P O RT) (A X )

• Content of A X is moved to port whose

address is specified by D X register.

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10.Relative Addressing
• In this addressing mode, the effective address of a
program instruction is specified relative to Instruction
Pointer (IP) by an 8-bit signed displacement.
Example: JZ 0 A H
O p era tions :
000A H  0A H (sign extend)
If ZF = 1, then
EA = (IP) + 000A H
B A = ( C S ) x 16 1 0
M A = B A + EA
• If Z F = 1, then the pr o g ra m control jumps to
new a ddr es s calculated above.
• If Z F = 0, then next ins truction of the
pro gra m is executed.
11.Implied Addressing

• Instructions using this mode have no operands.

The instruction itself will specify the data to be
operated by the instruction.
Example: CLC
• This clears the carry flag to zero.

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END?

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