COMBINATIONAL CIRCUITS

Presented By
S.Vijaya Lakshmi B.E,
Assistant Professor,
Department of Computer Science,
Sri Sarada Niketan College for Women, Karur.
COMBINATIONAL CIRCUIT
In input side of combinational circuit have an n number of inputs and m
number of outputs.
The output is depends on present inputs only.
CHARACTERISTIC
It is memory less. It is not capable to store data.
At any instant of time the output of combination circuit is depends upon the
present input.
It has ‘n’ input and ‘m’ output.
Working speed is fast.
Circuit design is not complex.
Time independent circuit.
There is no feedback element.
It doesn’t required clock signal.
It has no memory elements.
COMBINATIONAL CIRCUITS TYPES
ADDER COMBINATIONAL CIRCUIT
Adder circuit is a digital circuit that performs addition in computer. It is the
basic circuit in and is found in arithmetic logic units. The adder is two type

Half adder
Full adder
HALF ADDER
Half adder is a combinational logic circuit with two inputs and two outputs.
The half adder circuit is designed to add two single bit binary number A
and B. It is the basic building block for addition of two single bit numbers.
This circuit has two outputs carry and sum.
Block diagram
Truth Table
HALF ADDER(Conti…)
In the above table,
'A' and' B' are the input states, and 'sum' and 'carry' are the output states.
The carry output is 0 in case where both the inputs are not 1.
The least significant bit of the sum is defined by the 'sum' bit.
The SOP form of the sum and carry are as follows:
Sum = x'y+xy'
Carry = xy
Construction of Half Adder Circuit
In the block diagram, we have seen that it contains two inputs and two
outputs. The augent and addent bits are the input states,
and carry and sum are the output states of the half adder.
 The half adder is designed with the help of the following two logic
gates:
2-input AND Gate.
2-input Exclusive-OR Gate or Ex-OR Gate
HALF ADDER(Conti…)
1. 2-input Exclusive-OR Gate or Ex-OR Gate
The Sum bit is generated with the help of the Exclusive-OR or Ex-OR Gate.

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the inputs,
and the 'SUMOUT' is the final outcome after performing the XOR operation of both numbers.
The truth table of the EX-OR gate is as follows:
The result 1 when both of the inputs are different.
When both of the inputs are the same, the XOR gives the result 0.
2. 2-input AND Gate
The XOR gate is unable to generate the carry bit. For this purpose, we use
another gate called AND Gate. The AND gate gives the correct result of the
carry.

The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are
the inputs, and 'OUT' is the final outcome after performing AND operation of
both numbers.
The AND gate gives the result 1 when both of the
inputs are 1. When both of the inputs are different and 0,
the AND gates gives the result 0.
Half-Adder logical circuit
So, the Half Adder is designed by combining the 'XOR' and 'AND' gates and
provide the sum and carry.
There is the following Boolean expression of Half Adder circuit:
Sum= A XOR B (A+B)
Carry= A AND B (A.B)
The half adder is used to add onlyFull Adder
two numbers. To overcome this problem,
the full adder was developed. The full adder is used to add three 1-bit binary
numbers A, B, and carry C. The full adder has three input states and two output
states i.e., sum and carry.
Block diagram Truth Table
Full Adder(Conti…)
In the above table,
'A' and' B' are the input variables. These variables represent the two significant
bits which are going to be added
'Cin' is the third input which represents the carry. From the previous lower
significant position, the carry bit is fetched.
The 'Sum' and 'Carry' are the output variables that define the output values.
The eight rows under the input variable designate all possible combinations of
0 and 1 that can occur in these variables.
The SOP form can be obtained with the help of K-map as:

Sum = x' y' z+x' yz+xy' z'+xyz

Carry = xy+xz+yz
Construction of Full Adder Circuit
The above block diagram describes the construction of the Full adder circuit. In
the above circuit, there are two half adder circuits that are combined using the OR
gate.
The first half adder has two single-bit binary inputs A and B. As we know that, the
half adder produces two outputs, i.e., Sum and Carry.
The 'Sum' output of the first adder will be the first input of the second half adder, and
the 'Carry' output of the first adder will be the second input of the second half adder.
The second half adder will again provide 'Sum' and 'Carry'.
The final outcome of the Full adder circuit is the 'Sum' bit. In order to find the final
output of the 'Carry', we provide the 'Carry' output of the first and the second adder
into the OR gate. The outcome of the OR gate will be the final carry out of the full
adder circuit.
Construction of Full Adder Circuit
The MSB is represented by the final 'Carry' bit.
The full adder logic circuit can be constructed using the 'AND' and the '
XOR' gate with an OR gate.
Full Adder Circuit
The actual logic circuit of the full adder is shown in the above diagram. The full
adder circuit construction can also be represented in a Boolean expression.
Full Adder
 Perform the XOR operation of input A and B.
Sum:
Perform the XOR operation of the outcome with carry. So, the sum is (A XOR B) XOR C in which
is also represented as:
(A ⊕ B) ⊕ C in

Carry:
Perform the 'AND' operation of input A and B.
Perform the 'XOR' operation of input A and B.
Perform the 'OR' operations of both the outputs that come from the previous two steps. So the
'Carry' can be represented as:
A.B + (A ⊕ B)
Half Subtractor
The half subtractor is also a building block for subtracting two binary
numbers. It has two inputs and two outputs. This circuit is used to subtract two
single bit binary numbers A and B. The 'diff' and 'borrow' are two output
states of the half subtractor.

Block diagram Truth Table

Half Subtractor
The SOP form of the Diff and Borrow is as follows:
Diff= A'B+AB'
Borrow = A'B
In the above table,
'A' and 'B' are the input variables whose values are going to be
subtracted.
The 'Diff' and 'Borrow' are the variables whose values define the
subtraction result, i.e., difference and borrow.
The first two rows and the last row, the difference is 1, but the 'Borrow'
variable is 0.
The third row is different from the remaining one. When we subtract the
bit 1 from the bit 0, the borrow bit is produced.
Construction of Half Subtractor Circuit
In the block diagram, we have seen that it contains two inputs
and two outputs. The carry and sum are the output states of the
half subtractor. The half subtractor is designed with the help of
the following logic gates:
2-input AND gate.
2-input Exclusive-OR Gate or Ex-OR Gate
NOT or inverter Gate
Half Subtractor Circuit
The Diff bit is generated
1. 2-inputwith the help ofGate
Exclusive-OR the Exclusive-OR
or Ex-OR Gate or Ex-OR gate.

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B'
are the inputs, and 'Diff' is the final outcome after performing the XOR
operation of both numbers.
The XOR gate gives the result 1 when both of the
inputs are different. When both of the inputs are the
same, the XOR gives the result 0.
Half Subtractor Circuit
2. 2-input AND gate:
The XOR gate is unable to generate the carry bit. For this purpose, we use another
gate called AND gate. The AND gate is not enough to give the correct result
of 'Borrow'. We will use the NOT gate with the 'AND' gate to get the correct
result.
The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the
inputs, and 'OUT' is the final outcome after performing AND operation of both
numbers.
 The AND gate gives the result 1 when
both of the inputs are 1. When both of the
inputs are different and 0, the AND
gates gives the result 0.
So, the Half SubtractorHalf-Subtractor logical circuit
is designed by combining the 'XOR', 'AND', and
'NOT' gates and provide the Diff and Borrow.
The Boolean expression of the Half Adder circuit is given below:

Diff= A XOR B (A⊕B)

Borrow= not-A AND B (A'.B)
Full Subtractor
The Half Subtractor is used to subtract only two numbers. To
overcome this problem, a full subtractor was designed.
The full subtractor is used to subtract three 1-bit numbers A,
B, and C, which are minuend, subtrahend, and borrow,
respectively.
The full subtractor has three input states and two output
states i.e., diff and borrow.
Full Subtractor
In the above table,
'A' and' B' are the input variables. These variables
represent the two significant bits that are going to be
subtracted.
'Borrowin' is the third input which represents borrow.
The 'Diff' and 'Borrow' are the output variables that define
the output values.
The eight rows under the input variable designate all
possible combinations of 0 and 1 that can occur in these
variables.
Full Subtractor
The SOP form can be obtained
with the help of K-map as:

Diff=xy' z'+x' y' z+xyz+x'yz‘

Borrow=x' z+x' y+yz
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