Unit 3

 A computer program comprises a set of sequentially-ordered

instructions that the computer interprets and executes to
perform some user-specified tasks. Programs are written in
special programming languages that are human-readable.
 However, a computer can’t execute high-level code, for it only
understands binary machine code. Hence, for the execution of
a particular task, a computer first converts the high-level codes
into binary machine-executable codes and then performs the
user-specified task.
 An instruction code is a fundamental command that tells the
central processing unit (CPU) what specific operation to
perform. It's like a language that the CPU understands,
dictating the actions that make programs and applications
work.
• An instruction code, also known as machine code or machine
language, is a sequence of binary digits (0s and 1s) that a
computer's central processing unit (CPU) can directly
understand and execute.
• It's the lowest-level language that a computer works
with, representing fundamental operations and data.
Structure of an Instruction Code
In general, each instruction code is 16-bit and consists of three parts called
fields, which include:
• The mode field defines how the location of the operand can be found by
the computer. (0:direct addresses, 1:indirect addressing)
• The operation code field or Opcode specifies the operation, such as
addition, subtraction, shift, and complement, to be performed. The bits
required for the operation code may vary as it is dependent on the total
operations available on the computer.
• The address field contains the operand’s address, that is, memory or
register memory location. The operand is stored in the computer’s
memory just as data is stored. Based on the address of the operand,
there are different types of operands: direct operand, indirect operand,
and immediate operand.
Mode Opcode Address of
the Operand
 Memory-reference instruction: In this type of code, 12 bits
are used to specify the memory address, 3 bits for the
opcode (000 to 110), and 1 bit to specify the mode as indirect
addressing mode (I).
 Register-reference instruction: In this type of code, 12 bits indicate the
register operation address, 3 bits for the opcode (111), and 1 bit is
utilised for setting the mode as 0. The instructions are executed on the
register.
 Input-output instruction: This type of code contains a 12-bit input/output
operation address, 3 bits for the opcode (111), and 1 bit is utilised for
setting the mode as 1. These instructions are required to transfer to and
from the AC register and output device.
• In computing, an opcode which is short for operation code is
a fundamental part of machine language instructions that
tells a computer's central processing unit (CPU) what specific
operation to perform.
• It's like a command code that the CPU understands and
executes.
• Opcode: Specifies the operation to be carried out
(e.g., add, subtract, move data).
• Operands: Indicate the data or memory locations involved in the
operation (e.g., which numbers to add, where to store the result).
Instruction Fetch: The CPU fetches an instruction from
memory.
Decode: The CPU decodes the instruction, identifying the
opcode and operands.
Execute: The CPU performs the operation specified by the
opcode, using the operands as input.
Store Result: The CPU stores the result of the operation in
memory or a register.
Example:
(ADD R1, R2, R3)
• Opcode: ADD (tells the CPU to add numbers)
• Operands: R1, R2, R3 (registers holding the numbers to be added)
Types of opcodes:
• Arithmetic: Perform calculations
(add, subtract, multiply, divide).
• Logical: Perform logical operations (AND, OR, NOT).
• Data transfer: Move data between memory and
registers.
• Control flow: Alter the program's execution flow
(jumps, conditional branches).
 In SPA, the processor executes instruction codes stored in a memory unit, which
encodes both the instruction data and the data to be operated upon.
 The main innovation in SPA was that the same memory unit could be used to
both store the program and data, while traditional computers had separate
memories for each.
 It refers to the idea that a computer's instructions, or program, are stored in its
memory alongside the data that the program operates on.
 In SPA, a program is stored in the computer’s main memory, Random Access
Memory (RAM). Data can also be stored in RAM, which can be accessed when
required by the processor. This type of memory is volatile, other non-volatile
memories such as disk drives, tapes, and solid-state non-volatile memory (e.g.
flash memory) can also be used for data storage and access for programs if
needed.
 SPA eliminates the need for an interpreter to translate
instructions entered by the programmer. The instructions
entered are directly translated into machine code and the
processor executes these instructions without the assistance of
an interpreter. This makes the programming process a lot faster
than with the earlier model, where each instruction would have
to be translated before the machine could execute it.
 Additionally, SPA also enables users to create more
sophisticated programs. The architecture allows for more
flexibility and creativity in software development, as it enables
changes to be made quickly and easily.
 **Earlier computers, like the Colossus and ENIAC, had their
instructions hardwired into their circuitry or fed in through punched
cards or paper tape. This made them inflexible and difficult to
reprogram for different tasks.
• Some Advantages
• Flexibility: Computers can be easily programmed to perform different tasks
by simply changing the program in memory.
• Versatility: A single computer can run a wide variety of programs, making it
a general-purpose computing machine.
• Ease of development: Programs can be developed and tested on one
computer and then easily deployed to other computers with the same
architecture.
 Von Neumann architecture: This is the most common architecture, and it stores both
instructions and data in the same memory space.
 Harvard architecture: This architecture has separate memory spaces for instructions
and data.
 Registers are a type of computer memory used to quickly accept, store, and
transfer data and instructions that are being used immediately by the CPU. The
registers used by the CPU are often termed as Processor registers.
 A processor register may hold an instruction, a storage address, or any data (such
as bit sequence or individual characters).
 The computer needs processor registers for manipulating data and a register for
holding a memory address.
 Computer registers are memory storing units that operate at high speed. It's a
component of a computer's processor. It can hold any type of data, including a bit
sequence or a single piece of data.
 Eight registers, a memory unit, and a control unit make up a basic computer.
Types of Registers
Register Symbol Number of Bits Function
Accumulator AC 16 It's a processor register.
It stores the address of the
Program counter PC 12
instruction.
It is used for storing memory
Address Register AR 12
addresses.

It is a general-purpose register used

Data Register DR 16
for storing data during calculations.

It stores the current instruction being

Instruction Register IR 16
executed.

Temporary Register TR 16 It holds the temporary data.

Input Register INPR 8 It carries the input character.

Output Register OUTR 8 It carries the output character

• Accumulator Register(AC): Accumulator Register is a general-purpose
Register. The initial data to be processed, the intermediate result, and the final
result of the processing operation are all stored in this register. If no specific
address for the result operation is specified, the result of arithmetic operations is
transferred to AC. The number of bits in the accumulator register equals the
number of bits per word.

• Address Register(AR): The Address Register is the address of the memory

location or Register where data is stored or retrieved. The size of the Address
Register is equal to the width of the memory address is directly related to the size
of the memory because it contains an address. If the memory has a size of 2n *
m, then the address is specified using n bits.

• Data Register(DR): The operand is stored in the Data Register from memory.
When a direct or indirect addressing operand is found, it is placed in the Data
Register. This value was then used as data by the processor during its operation.
It's about the same size as a word in memory.

• Instruction Register(IR): The instruction is stored in the Instruction Register.

The instruction register contains the currently executed instruction. Because it
includes instructions, the number of bits in the Instruction Register equals the
number of bits in the instruction, which is n bits for an n-bit CPU.
• Input Register(INPR): Input Register is a register that stores the data
from an input device. The computer's alphanumeric code determines the
size of the input register.

• Program Counter(PC): The Program Counter serves as a pointer to the

memory location where the next instruction is stored. The size of the PC is
equal to the width of the memory address, and the number of bits in the
PC is equal to the number of bits in the PC.

• Temporary Register(TR): The Temporary Register is used to hold data

while it is being processed. As Temporary Register stores data, the
number of bits it contains is the same as the number of bits in the data
word.

• Output Register(OUTR): The data that needs to be sent to an output

device is stored in the Output Register. Its size is determined by the
alphanumeric code used by the computer.
 A bus system is a collection of pathways that enables data transfer
between different components within the computer.
 A bus is a pair of signal lines that allows multi-bit data to be
transferred from one system to another. A common bus is a more
efficient method of sending data in a system with multiple registers.
The common bus connects the outputs of seven registers and
memory.
 (Imagine it like a network of highways that allows information
to travel between various cities (computer components)
efficiently.)
 Bus is the electrically conducting path along which data is transmitted inside any
digital electronic device.
 A Computer bus consists of a set of parallel conductors, which may be conventional
wires, copper tracks on a PRINTED CIRCUIT BOARD, or microscopic aluminum trails on
the surface of a silicon chip.
 Each wire carries just one bit, so the number of wires determines the most significant
data WORD the bus can transmit: a bus with eight wires can carry only 8-bit data
words and hence defines the device as an 8-bit device.
Address Bus: The address bus carries information about the
location of data in memory.
• It is Unidirectional.
• Based on the width of an address bus we can determine the
capacity of a main memory.
 Data Bus: The data bus allows data to travel back and
forth between the CPU, memory (RAM) and IO.
• It is Bidirectional.
• Based on the width of a data bus we can determine the
word length of a CPU.
• Based on the word length we can determine the
performance of a CPU.
 Control Bus : The control bus carries the control signals and
timing signals that make sure everything is flowing smoothly
within system.
• Control signals indicate the type of operation.
• Timing Signals are used to synchronize the memory and IO
operations with a CPU clock.
• Typical Control Lines may include Memory Read/Write, IO
Read/Write, Bus Request/Grant, etc.
The basic computer registers and
memory
connection to a common bus system:
 In computer architecture, the instruction format is defined as standard machine instruction format
that can be directly decoded and executed by the central processing unit (CPU).
 The instruction format is simply a sequence of bits (binary 0 Or 1) contained in a machine
instruction that defines the layout of the instruction.
 The machine instruction contains number of bits (pattern of 0 and 1 ). These bits are grouped
together called fields.
 Each field of the machine instruction provides specific information to the CPU regarding the
operation to be performed and the location of the data.
 An instruction format is also defied as layout or pattern of bits in the machine instruction that
directs the CPU to decode and execute the instruction.
 In other words, the instruction format defines the layout of the bits for the instruction. The
instruction formats supported by the CPU depends upon the instruction set architecture (ISA)
implemented by the processor.
 The instruction format describes the layout of the instruction in terms of
group of bits called fields of the instruction format.
 Each field (group of bits) in the instruction format provide a specific
information to the processor. The processor needs to know the
information regarding the operation to be performed and the location of
the data ( address).
 In computer architecture, instruction set completeness refers to the ability of a
processor's instruction set to theoretically execute any computer program.
 In simpler terms, an instruction set is considered complete if it allows the processor to
perform any computation that's mathematically possible.
Instruction Set Completeness
 A set of instructions is said to be complete if the computer includes a sufficient number of
instructions in each of the following categories:
• Arithmetic, logical and shift instructions
• A set of instructions for moving information to and from memory and processor registers.
• Instructions which controls the program together with instructions that check status conditions.
• Input and Output instructions

 Arithmetic, logic and shift instructions provide computational capabilities for processing the
type of data the user may wish to employ.
 A huge amount of binary information is stored in the memory unit, but all computations are
done in processor registers. Therefore, one must possess the capability of moving
information between these two units.
 Program control instructions such as branch instructions are used change the sequence in
which the program is executed.
 Input and Output instructions act as an interface between the computer and the user.
Programs and data must be transferred into memory, and the results of computations must
be transferred back to the user.
 Instruction set completeness refers to the extent to which a computer's
instruction set architecture (ISA) includes a comprehensive and
versatile set of instructions that can perform a wide range of operations.
An instruction set is a collection of machine-level instructions that a
processor can execute, and its completeness is crucial for enabling a
diverse set of tasks and computations.
 A complete instruction set should provide instructions for arithmetic
operations, data movement, control flow, logical operations, and other
essential functions needed to execute software programs efficiently.
 The completeness of an instruction set is often evaluated based on its
ability to support various programming constructs, algorithms, and
applications without the need for frequent workarounds or complex
optimizations.
 Having a more complete instruction set can contribute to the versatility
and performance of a processor, allowing it to handle a broader range
of tasks and improve the overall efficiency of software execution.
 https://youtu.be/-Qs5Ypwnb9c

 The control unit is the main component of a central processing unit

(CPU) in computers that can direct the operations during the execution
of a program by the processor/computer.
 The main function of the control unit is to fetch and execute instructions
from the memory of a computer. It receives the input
instruction/information from the user and converts it into control
signals, which are then given to the CPU for further execution.
 It is responsible for providing the timing signals, and control signals and
directs the execution of a program by the CPU. It is included as an
internal part of the CPU in modern computers.
 It controls and directs the main memory, arithmetic & logic unit (ALU),
input and output devices, and also responsible for the instructions that
are sent to the CPU of a computer.
 Components of a Control Unit
 The components of contorl unit are instruction registers, control signals
within the CPU, control signals to/from the bus, control bus, input flags,
and clock signals.
 The components of the Hardwired control unit are instruction register
(contains opcode and address field), timing unit, control state generator,
control signal generation matrix, and instruction decoder.
 The components of the Micro programmed control unit are the next
address generator, a control address register, control memory, and control
data register.
Functions
The functions of the control unit include the following.
 It directs the flow of data sequence between the processor and other
devices.
 It can interpret the instructions and controls the flow of data in the
processor.
 It generates the sequence of control signals from the received
instructions or commands from the instruction register.
 It has the responsibility to control the execution units such as ALU, data
buffers, and registers in the CPU of a computer.
 It has the ability to fetch, decode, handle the execution, and store
results.
 To transfer the data, it communicates with the input and output devices
and controls all the units of the computer.
 Hardwired Control Unit
 In this type, the control signals are generated by a special hardware logic
circuit without any change in the structure of the circuit. In this, the
generated signal cannot be modified for execution in the processor.
 The basic data of an opcode (operation code of an instruction is sent to
the instruction decoder for decoding. The instruction decoder is the set of
decoders to decode different types of data in the opcode.
 This results in output signals which contain values of active signals that
are given as the input to the matrix generator to generate control signals
for the execution of a program by the processor of the computer.
 The matrix generator provides states of controls unit and the signals out from the
processor (interrupt signals). Matrix is built as the programmable logic array. The control
signals generated by the matrix generator are given as the input to the next generator
matrix and combines with the timing signals of the timing unit that contains rectangular
patterns.
 For fetching of new instruction, the control unit turns into an initial stage for the execution
of new instruction. The control unit remains in the initial stage or first stage as long as the
timing signals, input signals, and states of instruction of a computer are unchanged. The
change in the state of the control unit can be raised if there any change in any of the
generated signals.
 When an external signal or interrupt occurs, the control unit goes to the next state and
performs the processing of the interrupt signal. The flags and states are used to select the
desired states to perform the execution cycle of instruction.
 In the last state, the control unit fetches the next instruction and sends the output to the
program counter, then to the memory address register, to the buffer register, and then to
the instruction register to read the instruction. Finally, if the last instruction (which is
fetched by the control unit) is end instruction, then it goes to the operating state of the
processor and waits until the user directs the next program.
 Micro Programmed Control Unit
 In this type, the control store is used to store the control signals which
are encoded during the execution of a program. The control signal is
not generated immediately and decoded because the microprogram
stores address field in the control store. The whole process is a single
level.
 The micro-operations are done for the execution of micro-instructions
in the program. The block diagram of the Micro programmed control
unit is shown above. From the diagram, the address of the micro-
instruction is obtained from the control memory address register. All
the info of the control unit is permanently stored in the control memory
called ROM.
 The micro-instruction from the control memory is held by the control
register. Since the micro-instruction is in the form of control word
(contains binary control values) that needs 1 or more micro-
operations to be performed for the data processing.
 During the execution of micro-instructions, the next address
generator computed the next address of the micro-instruction and
then send to the control address register to read the next micro-
instruction.
 The sequence of micro-operations of a micro-program is performed
by the next address generator and acts as microprogram sequencer
to get the sequence address i.e., read from the control memory.
 Timing signals are an essential component of computer architecture. Timing signals are
used to control input and output, allowing devices to interact with one another.
 Timing signals are also used as a synchronized clock to keep events in sync across
multiple locations.
 Timing signals enable computers to perform operations faster. Without these signals,
executing instructions in a given time frame would not be possible.
 A timing signal is generated by a circuit or chip called a time-marker or clock-generator.
When a timing signal is generated, it enables activities like data transfer and I/O to
occur. The timing signal decides how exactly a particular operation will take place.
 The signals themselves are based on varying frequencies, typically between 0.1-10
MHz. These signals form the all-important base on which logic gates send data
between discrete components. This can be either digital or analog style. Without timing
signals, computers simply wouldn’t work in their standard form.
 Most computers are equipped with multiple clocks. These are
present in order to regulate different activities within the
system. Each clock causes voltages to oscillate at different
frequency, thereby producing a pulse that can be used as a
timing signal for certain operations. The number and type of
clocks used depend on the nature of the particular computer
architecture.
 Computer architectures use timing signal to activate transistors
which regulate the flow of electrons through various
components. This is a vital step at several points within the
system. For example, the signal may be sent to a transistor
regulated by a processing unit to initiate data processing.
Without this signal, the processing operation would never take
place.
 In computer organization, an instruction cycle, also known as a fetch-decode-
execute cycle, is the basic operation performed by a central processing unit (CPU)
to execute an instruction. The instruction cycle consists of several steps, each of
which performs a specific function in the execution of the instruction. The major
steps in the instruction cycle are:
1.Fetch: In the fetch cycle, the CPU retrieves the instruction from memory. The
instruction is typically stored at the address specified by the program counter (PC).
The PC is then incremented to point to the next instruction in memory.
2.Decode: In the decode cycle, the CPU interprets the instruction and determines
what operation needs to be performed. This involves identifying the opcode and
any operands that are needed to execute the instruction.
3.Execute: In the execute cycle, the CPU performs the operation specified by the
instruction. This may involve reading or writing data from or to memory,
performing arithmetic or logic operations on data, or manipulating the control
flow of the program.
 Memory Reference Instruction
 Register Reference Instruction
 I/O Instruction
Memory Reference Instruction
 This type of instruction is divided into three parts-mode, opcode and address. The first 12 bits of
memory (0-11) specify an operation address. The next three bits (12-14) specify an opcode, and the
last bit (I) specifies the addressing mode. If I is 0, it specifies a direct addressing mode, and if I is 1, it
specifies an indirect addressing mode.
The operands specified by memory reference instructions are:
• AND: This instruction performs the ‘AND’ logical operation between the accumulator’s contents and
the content that resides in the memory address specified by the instruction. The final result of the
operation is stored in the accumulator.
• ADD: This instruction adds the content stored in the accumulator with the content stored in the
address mentioned in the instruction and stores the result in the accumulator.
• LDA: This instruction stores the operand from a memory location in the accumulator.

• STA: This instruction stores the accumulator’s content in the address specified by the instruction.

• BUN (Branch Unconditionally): This instruction mentions the address of an instruction that is to be
executed out of sequence.
• BSA: The ‘Branch and Save Return Address’ (BSA) instruction transfers the execution of a program
to another portion (a subroutine) which is to be executed out of sequence.
• ISZ: This instruction increases the value of the effective address by 1. If the value after
incrementation is equal to zero, the value of the program counter increments by 1. Its full form is
Increment and skip if zero.
Register Reference Instruction
This type of instruction is divided into three parts – mode, opcode, and register operation.
The first 12 bits of memory (0-11) specify a register operation. The next three bits (12-14)
specify an opcode. The opcode for a register reference instruction is always 111. The last bit
specifies the addressing mode. This bit is always zero.
The different types of register operations are as follows:
Symbol Description Hexadecimal code
HLT Halt computer 7001
SZE Skip if E is zero 7002
SZA Skip if accumulator is 7004
zero
SNA Skip if accumulator is 7008
negative
SPA Skip if accumulator is 7010
positive
INC Increment accumulator 7020
CIL Circulate left 7040
CIR Circulate right 7080
CME Complement E 7100
CMA Complement 7200
accumulator
CLE Clear E 7400
CLA Clear accumulator 7800
 Input-output instruction
 This type of instruction is divided into three parts – mode, opcode, and
input/output operation. The first 12 bits of memory (0-11) specify an
input/output operation. The next three bits (12-14) specify an opcode. The
opcode for an I/O reference instruction is always 111. The last bit specifies
the addressing mode. This bit is always 1.

 The different types of I/O operations are as follows:

Symbol Description Hexadecimal
code
IOF Interrupt off F040
ION Interrupt on F080
SKO Skip on flag F100
output
SKI Skip on flag input F200
OUT Output the F400
contents from an
accumulator
INP Input a character F800
to accumulator
 An interrupt in computer architecture is a signal that requests the
processor to suspend its current execution and service the occurred
interrupt.
 To service the interrupt the processor executes the corresponding
interrupt service routine (ISR). After the execution of the interrupt
service routine, the processor resumes the execution of the suspended
program. Interrupts can be of two types; hardware interrupts and
software interrupts.
 A program interrupt is a signal that temporarily halts the normal
execution of a program to handle a more urgent event.
Types of Interrupts:
Hardware Interrupts
 If a processor receives the interrupt request from an external I/O device it is
termed as a hardware interrupt. Hardware interrupts are further divided into
maskable and non-maskable interrupt.
• Maskable Interrupt: The hardware interrupt that can be ignored or delayed for
some time if the processor is executing a program with higher priority are termed
termed as maskable interrupts.
• Non-Maskable Interrupt: The hardware interrupts that can neither be ignored nor
nor delayed and must immediately be serviced by the processor are termed as
non-maskable interrupts
For example:
• Keyboard or mouse input: When a key is pressed or the mouse is
moved, it generates an interrupt to notify the system.
• Disk drive completion: When data transfer to/from a disk is finished, it
sends an interrupt.
• Network card activity: Upon receiving or sending data packets, the
network card triggers an interrupt.
 Software Interrupts
 The software interrupts are the interrupts that occur when a
condition is met or a system call occurs.
 A software interrupt is a signal initiated by software itself,
notifying the processor that there's an event requiring
immediate attention. It's different from a hardware interrupt,
which originates from external devices like keyboards or
network cards.
 For eg. System calls issued by programs to access operating system
services (e.g., reading a file, sending a network message).
 Interrupt Cycle

 The interrupt cycle refers to the sequence of events that occur when a computer processor
receives and responds to an interrupt. When an interrupt is triggered, the processor
temporarily halts its normal execution to handle the interrupt.
 Interrupt cycle is very similar to the instruction cycle. At the very start, the status of flip-flop
R is checked. If it is 0 there is no interrupt and CPU can continue it's ongoing tasks. But
when R=1, it denotes that the ongoing process should halt because an interrupt has
occured.
 When R=0, CPU continues it's tasks checking the status of IEN in parallel. If it is 1, FGI
and FGO are checked in a hierarchy. If any of these flip-flops are found set, R is
immidiately set by 1.
 When R=1, the content in PC (adress of next instruction in memory) is saved at M[0] and
then PC is set by 1 enabling it to point the BUN operation. The instruction at M[1] is a BUN
instruction that leads the control to approriate I/O ref. Instruction stored at some other
location in the memory. Now separate Fetch, Decode and Execute phases are practised to
entertain the I/O ref. instruction.
 Once the I/O ref. instruction is executed completely, PC is loaded with 0 where it finds the
saved RETURN address. The entire workout is diagrammed as follows:
IEN: Interrupt Enable Flip Flop
R: Interrupt Flip Flop