Lecture 1

Computer
organization

Dr. Marwa Gamal

COMPUTER AND ITS ORGANIZATION
 There are five building blocks
Input Unit (The basic
purpose of this unit is to read the
data into the machine.)

Output Unit (After

processing of the data in the
Arithmetic and Logical Unit, the
results are displayed to the
output world through this unit. )
 Memory Unit (The memory of a computer is used
for storing two type of information such as data and
program. The main memory is a random access
memory).The read/write operations are performed
using two registers, Memory Address Register (MAR)
contains the address, and Memory Buffer Register
(MBR) contains data to be written or data after the
read operation.
 Arithmetic and Logical Unit (ALU) (is used for
performing arithmetic operations and other logical
operations on the data.)
COMPUTER AND ITS ORGANIZATION
 Control Unit (is the central nervous system of
the computer) It controls all other units - controls
the flow of data from one unit to another for
performing computations- sequences the
operations - It instructs all the units to perform the
task in a particular sequence with the help of clock
pulses).
Control Unit
The program counter contains the
address of the current instruction in
memory and is incremented during
the instruction execution.
The Instruction Register stores the
instruction read from memory.
Since the instruction received by the
control unit is a bit pattern, it should
be decoded to generate a particular
sequence of control signals required.
The instruction decoder is a basic and
necessary part of the control unit
Control Unit
 Stack
The control unit maintains a stack in CPU or main memory.
Stack is like a tunnel whose other end is closed, with the
result that the last entry will make the first exit. Because
of this, stack is also called Last-In First-Out (LIFO)
queue. The Stack Pointer (SP) points to the next
available memory location in the stack. There are two
operations which can be performed on stack. They are
PUSH (write data into stack) and POP (read data from
stack).
Instruction Execution
The instruction execution includes two basic steps
1. Instruction fetch, reading of instruction from
memory (fetch cycle).
2. Instruction execute, generation of control
signals (execute cycle).
Clock
 All operations in the computer are controlled by clock
signals.
 there are two edges (leading edge and trailing edge) and
two states (level 0 state and level 1 state) per period. All
the actions in the computer are initiated either by the
leading edge or by trailing edge of the clock and take a
fixed number of clock periods to complete.

The clock, therefore,

controls the generation
of all control signals in
the computer.
Instruction Format
•The operation code specifies the operation to be
performed, such as movement of data, arithmetic operation
(addition, subtraction, multiplication, division, etc.), logic
operation (AND, OR, XOR, etc.) branch operation
(unconditional jump, conditional jump, subroutine call, return,
etc.).
•The operand address specifies the location of operand.
• The Addressing Mode bits
specify the operand location and
how to determine the address
of the operand in memory.
Addressing Modes
The addressing mode specifies:
 Where the operand is located
 How to reach the operand location
The operand may be located as:
 Immediate data as part of the instruction
 Data stored in one of the registers
 Data stored in memory
Immediate addressing mode
 Data is specified as part of the instruction
Examples::
MVI B, 05 (in Intel 8085)
(B) = 05
MOV BX, 97F0H (in Intel 8086)
(BX) = 97F0H
Register addressing mode
 The operand is located in one of the registers.
 The name of the register in coded form may be
specified in the operation code, in addressing
mode bits or separately as operand code.
 For example:
ADD AX, BX (in Intel 8086)
(AX) = (AX) + (BX)
AX and BX are 16-bit registers
Memory addressing modes
 When a data byte/word is located in memory, its
address needs to be determined to access the data
and to perform the specified operation. The
address of the operand may be
 specified directly in the instruction.
 given indirectly in the instruction.
 mentioned in the instruction with respect to content
of the other register.
 given indirectly in the instruction but with respect to
the content of the other register.
Memory addressing modes
 Direct addressing mode: the memory operand
address is specified as part of the instruction. For
example
LDA 2400H (in Intel 8085)
(A) = (2400H)
 Indirect addressing mode: In this memory
addressing mode, the instruction specifies the
place (a register or a memory location) where the
operand address is stored
EX: ADD A, @R0 (in Intel 8051)
The contents of the memory location whose address is given
in R0 register are ADDed to A register contents and the result
is stored back in A register.
Memory addressing modes
 Indexed addressing mode: is useful when different
elements of a list or an array are to be accessed in
loop for performing the same set of operations.
In this mode:
 The base of the array is specified in a register
called Base register.
 The index or distance of the element from the base
of the array to be accessed is specified in a register
called Index register.
 The sum of the contents of Base register and
Index register is the address of the operand in
memory.
Indexed addressing mode
 Assume that the ten numbers, X1, X2, …, X10 are stored
in memory in consecutive locations starting from 0200H.
 The address 0200H is the base of the array(stored in
Base register).
 To access X5, the Index register will contain 04.
 Thus, the operation in loop may be performed as
follows:
Start: Load the Base register with the base location of the array
Load the Index Register with 0
Loop: Perform Operations
Increment the Index Register
If the Index Register contents less than or equal to N
then branch to loop else continue.
This addressing mode is called Base plus Index
Indirect Addressing mode
Indexed addressing mode
 in case of two-dimensional arrays.
 Base register contains the base address of the
array.
 Index register contains the increment from base
to the row where the data is stored.
 Displacement mentioned in the instruction or in
a separate register is the displacement of the
element from the start of the row.
Addressing techniques
Instruction Set
Five general groups
Data transfer group
Arithmetic and logic group
String manipulation
Program control group
Execution control instructions
Data transfer group
This group of instructions deals with the movement of data
in byte/word/bit form between
 Register to Register
 Memory to Register EX:: LDA 2000H (in Intel 8085)
Loads data from memory location 2000H to A register.
 Register to Memory
 Immediate data to Register EX::MOV A, # 02(in Intel 8051)
02 is loaded to A register.
 Immediate data to Memory
 Exchange of data between two registers
EX:: MOV BX, CX (in Intel 8086)
Moves the contents of CX register to BX register. The
contents of CX register remain unchanged.
Arithmetic and logic group
Arithmetic Operation
 Addition of two data bytes/words
 Addition with carry of two data bytes/words
 Subtraction of two data bytes/words
 Subtraction with borrow of two data bytes/words
 Multiplication of two data bytes/words
 Division of two data bytes/words
 Increment of a data byte/word present in register/memory
 Decrement of a data byte/word present in register/memory
Logical Operations
 AND, OR, XOR, operations between two data bytes/words present in
register/memory
 NOT operation on a data byte/word present in register/memory
 Shift/Rotate (left/right rotation with/without carry operations on data
byte/word present in register/memory)
STRING MANIPULATION
 Loading/storing of byte/word string elements
 Movement of byte/word string elements to
another memory location
 Comparison of two byte/word string elements.

PROGRAM CONTROL GROUP

 Conditional/Unconditional branch
 Conditional/Unconditional call to subroutine
 Return from subroutine
 Restart
Execution control instructions
 The instructions in this group relate to:
 No operation
 Halt
 Enabling/Disabling Interrupts
 Initialization of control/function registers for interrupts,
In addition, there are some instructions which fall under
more than one category.
For example,
DNJ Rn, ‘address’ (in Intel 8051)
performs two functions:
Decrements register Rn
If Rn # 0 then control is transferred to ‘address’
PROGRAMMING SYSTEM
 1)Machine Language Program
When the computer was first invented, machine
language was the only language available to the
users.
Machine language consists of different binary
numbers (bit patterns) for different operations.
It is very difficult to write programs in machine
language. A single bit error in any instruction will
produce undesirable results
Machine Language Program
Example, let us consider two numbers stored in memory
location 2400(Hex) and 2401(Hex). We need to add these
numbers and store the result in memory location 2402(Hex).
Let us assume that 2400(Hex) contains 05 and 2401(Hex)
contains 06.
2)Assembly Language Program
 The limitations of machine language led to the
development of assembly language. In assembly
language, each machine instruction has been replaced
by a mnemonic
 It became easier for the user to write programs in
assembly language rather than in machine language.

 Assembly language program is easier to understand

than the corresponding machine level program.
Assembly Language Program
 The assembly language programs are
translated to machine level programs
using another sub-system called
assembler as shown
3) Assembler Directives
There are two instructions in assembly program given
above which are not the actual instructions of Intel 8085
microprocessor and as such these are not translated into
machine instruction.
1. ORG 2000H indicates to Intel 8085 assembler that the
following instructions are to be loaded, starting from
memory location 2000 Hex.
2. Similarly END indicates to Intel 8085 assembler that
the program has ended and thus no translation of
assembly instructions to machine instructions is required.
Such instructions are known as Pseudo instructions or Assembler
Directives
3) Assembler Directives
 Every assembler will have Pseudo Instructions
/directives to help the programmer to communicate
the program requirements to the assembler. A
common assembler directive is:
Operation—Define
EQU—Define a name
 For example
X EQU 02
Y EQU 05
Define X and Y with 02 and 05 and while translating the assembly program into
machine level program, X and Y will be replaced by 02 and 05 respectively.

 These directives are mostly common in different assemblers.

4) Compilers
 With the growth of computers, the problems that
the users wanted to solve on computer became
more and more complex.
 The development of high-level languages like
BASIC, FORTRAN, ALGOL, C etc. the program
writing became easier. To execute the high-level
language programs on a computer, it is
necessary to translate them into machine level
language by a compiler
5) Operating Systems
 The operating system also allocates
computer resources to the user program.
In different environments, the operating
system plays different roles and is quite
complex.