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Syllabus for Digital Logic Design

The document outlines the course details for Digital Logic Design (ECEg3101) at Debre Tabor University, including course objectives, content, and assessment methods. It covers topics such as number systems, logic gates, Boolean algebra, combinational and sequential circuits, and requires attendance and active participation. The course is compulsory for 4th-year students in the BSc in Electrical and Computer Engineering program.

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0% found this document useful (0 votes)
21 views

Syllabus for Digital Logic Design

The document outlines the course details for Digital Logic Design (ECEg3101) at Debre Tabor University, including course objectives, content, and assessment methods. It covers topics such as number systems, logic gates, Boolean algebra, combinational and sequential circuits, and requires attendance and active participation. The course is compulsory for 4th-year students in the BSc in Electrical and Computer Engineering program.

Uploaded by

edosa misgenu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Debre Tabor University

Gafat Institute of Technology


Department of Electrical and Computer Engineering
Instructor’s Name: Sileabat D. & Tewodros S. Phone No.: +251918133243/+251984249738

Email: [email protected] Office Block/No.: B-143/R-105


Course Code ECEg3101
Course Title Digital Logic Design
Degree Program BSc in Electrical and Computer Engineering
Module Title Digital electronics

ECTS 5
Contact Hours (per Lecture Tutorial Practice or Laboratory Home study
week) 2 1 2 5
Target Groups: 4th year Section: 1 & 2 Semester: I Academic Year: 2024 G.C
 Convert between decimal, binary, octal, and hexadecimal
number systems.
 Differentiate different Codes in digital system.
 Perform two-level logic minimization using Boolean algebra
and Karnaugh maps minimization method.
 Analyze the properties and realization of the various logic
gates.
 Perform binary addition and subtraction.
 Implement the Boolean Functions using NAND and NOR
Course Objectives
gates.
 Incorporate medium scale integrated circuits, like
decoders, encoders, multiplexers, etc., into circuit design.
 Differentiate and Design Combinational and Sequential
circuits.
 Design and analyze clocked sequential circuits.
 Use various types of latches and flip-flops to build binary
memory and counters.
 Perform asynchronous and synchronous sequential logic

1
analysis

This course provides an overview of the principles underlying


Course Description Number systems, arithmetic operations, decimal codes,
alphanumeric codes, Boolean algebra, Karnaugh maps,
implementation of digital logic gates using universal
gates(NAND and NOR gates), exclusive-OR gates, integrated
circuits, combinational circuits, decoders, encoders,
multiplexers, Demultiplexers adders, subtractors, multipliers,
sequential circuits, latches, flip-flops, sequential circuits
analysis, and counters. Finally, under this course, Analysis and
design of combinational and sequential logic systems will be
done.

Week Contact hour Course Contents


Chapter 1: Introduction to Digital Systems
Week
10Hrs 1.1 Digital and analogue quantities
1,2
1.2 Binary digit logic level and digital waveform
Chapter Two: Logic gates
Week 1.1 introduction to Logic gates
20Hrs
3,4,5,6 1.2 types of Logic gates (inverter, AND gate, OR gate, NAND
gat, NOR gate, Exclusive OR and Exclusive NOR gates)

Chapter Three: Boolean algebra and Logic


simplification
3.1.Boolean operation and expression
Week
10Hrs 3.2.Laws and rules of Boolean algebra
7,8
3.3. De morgan Theorems
3.4. Boolean analysis of logic circuit
3.5.The K-map
Chapter Four: Combinational Circuit
Week
15Hrs 4.1. Functions of combinational logic
9,10,11
4.2. Basic combinational logic circuits

2
4.3. Implementing Combinational logic Universal property
of NAND and NOR gates
4.4. Adders, decoders, encoders, multiplexers and de
multiplexers
Chapter Five: Sequential Circuit
5.1.Flip flops
5.1.1 Latches
5.1.2 Edge triggered flip flops
5.1.3 Master slave flip flops
5.1.4 Applications
5.2 Counters
Week
15Hrs 5.2.1 Synchronous counters
12,13,14
5.2.2 Asynchronous counters
5.2.3 Up/down counters
5.2.4 Design of synchronous counters
5.3 Shift registers
5.3.1 Basic shift registers
5.3.2 Serial in serial out registers
5.3.3 Serial in parallel out Registers
Pre-requisites ECEg3073-Applied Electronics II
Year/Semester III/II
Status of Course Compulsory
Teaching & Learning Lectures, laboratories, group discussions, Exercises and
Methods Assignments
 Continuous Assessment (Quiz’s, Test Assignments/Project
Assessment Methods Laboratory report)........................................................50%
 Final exam.................................................................... 50%
All students are expected to abide by the code of conduct of
students throughout this course.
Academic dishonesty, including cheating, fabrication, and
Course policies
plagiarism will not be tolerated.
Class activities will vary day to day, ranging from lectures to
discussions.

3
Students will be active participants in the course.
Students are required to submit and present the assignments
provided according to the time table indicated.
100% of class attendance is mandatory!
Every student should be on time for the session. Students are
not allowed to enter if they are late more than five minutes.
Active participation in the lab is essential.
Cell phones MUST be turned off before entering the lab.
[1] Morris M. Mano: Digital Design (3rd Edition)

[2] R. J. Tocci and N. S. Widmer: Digital Systems –


References
Principles and Applications, 9th Ed, Prentice Hall, 2004
[3] T.L. Floyd: Digital Fundamentals, 9th edition ,Prentice
Hall

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