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Unit 2

The document provides an overview of instruction sets, detailing the characteristics of machine instructions, types of operands, and various operations performed by CPUs. It explains assembly language as a low-level programming language that interacts closely with hardware, and discusses different addressing modes that specify how operands are accessed. Additionally, it covers instruction formats, including fixed and variable lengths, and illustrates examples of three types of instruction formats.

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Prachi Shinde
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0% found this document useful (0 votes)
7 views

Unit 2

The document provides an overview of instruction sets, detailing the characteristics of machine instructions, types of operands, and various operations performed by CPUs. It explains assembly language as a low-level programming language that interacts closely with hardware, and discusses different addressing modes that specify how operands are accessed. Additionally, it covers instruction formats, including fixed and variable lengths, and illustrates examples of three types of instruction formats.

Uploaded by

Prachi Shinde
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit 2: Instruction Set

What is an instruction set?


An instruction set is a group of commands for a central processing unit (CPU) in machine language.

Characteristic of machine instructions:


The operation of the CPU is determined by the instructions it executes is referred to as machine
instructions or computer instructions. The collection of different instructions that the CPU can
execute is referred to as the CPU's instruction set.
(Instruction cycle state diagram)
Each instruction must contain the information required by the CPU for execution. Fig. shows the
steps involved in instruction execution and define the elements of a machine instruction. The
essential elements of a computer instruction are-

To execute instruction, first need to find location of instruction.so location of first instruction
will be-Program Counter

PC-Stores the address of next instruction to be executed.

1)Instruction address calculation - Determine the address of next instruction to be executed. This
involves adding fix no. to the address of previous instruction.

2) Instruction Fetch - Read instruction from its memory location into cpu.

3)Instruction operation decoding - it tells what type of operation to be performed + what are
operands.

4) Operand address calculation- operation include operand in memory then determine address of
operand.
5)Operand Fetch- Fetch operand from memory or input/output. for more than one pm operand
repeat the process.

6)Data operation- perform operation which is indicated in instruction inside ALU (may be
add/sub/mul/divi.)

7)Operand store -To store the result of operation it Should be write into memay or I/o.So we have
to calculate operand address & then store the result. if multiple results. repeat the procedure.As one
instruction is successfully executed then it will go to starting location to fetch next instruction.

TYPES OF OPERANDS
Machine instructions operate on data. Most important general categories of data are:
1. Addresses
2. Numbers
3. Characters
4. Logical data

1. Addresses
Addresses are form of data. In many cases, some calculation must be performed on the operand
reference to determine the main or virtual memory addresses. In this context addresses can be
considered as unsigned integers.

2. Numbers
All computers support numeric data types. The three common numeric data types are:
a. Integer or fixed point data
b. Floating point data
c. Decimal data
 All internal computer operations are binary in nature, users of system deal with decimal
numbers.
 Thus, there is a necessity to convert a decimal number to binary number after input and
from binary to decimal at the time of output.
 Each decimal digit is represented by a 4-bit code. So 0 =0000, 1 = 0001, and 9=1001

3. Characters:
 A common form of data is text or character strings.
 Characters are represented by a sequence of bits.
 The characters are encoded in bits by using ASCII values, IRA (International Reference
Alphabet) and Extended Binary Coded Decimal Interchange Code (EBCDIC).

4. Logical Data:
 Each word or other addressable unit (bit, byte, word, double word, quad word, and ten
words) is treated as a single unit of data.
 Consider an n-bit unit consisting of n-1 bit items of data, each item having the value 0 or 1
,they are considered to be Logical Data.
 Logical data is used to store an array of Boolean or binary data items(0 or 1)

Types of operations are as follows:


1. Data transfer operations
2. Arithmetic operations
3. Logical operations
4. Conversion operations
5. I/O operations
6. System control operations
7. Transfer of control operations

Common Instruction Set Operations

Sr.No Type Operation Name Description

Move (transfer) Transfer word or block from source to destination

1. Data transfer
Store Transfer word from processor to memory

Load(fetch) Transfer word from memory to processor

Exchange Swap contents of source and destination

Clear(reset) Transfer word 0s to destination

Set Transfer word 1s to destination

Push Transfer word from source to top of stack

Pop Transfer word from top of stack to destination

Add Compute sum of two operands


Subtract Compute difference of two operands
2. Arithmetic
Multiply Compute product of two operands
Divide Compute quotient of two operands
Absolute Replace operand by its absolute value
Negate Change sign of operand
Increment Add 1 to operand
Decrement Subtract 1 to operand
AND Perform the specifies
OR
3. Logical NOT
Exclusive-OR Test Test specified operation
Compare Make logical or arithmetic comparison
Shift Left/right shift operand introducing constants at ..
Rotate Left/right shift operand with
wrap around end
Jump(branch) Unconditional transfer
Jump conditional Conditional transfer
4. Transfer of
Jump to subroutine Place current PC informed
control
in known location, jump specified address
Return Replace contents of PC
other register from known location
Execute Fetch operand from specified location and execute
as instruction, do not modify PC.
Skip Increment PC to skip re instruction
Skip conditional Check condition
Halt Stop program execution
Wait(Hold) Stop program execution
check condition resume execution when condition
is satisfied
No operation No operation is performed but program execution
is continued.
Input(read) Transfer data from specified I/O port or device to
destination(e.g. main memory or processor
5. I/O register)

Output(Write) Transfer data from specified source to I/O port or


device

Start I/O Transfer instruction to I/O processor to initiate I/O


operation
Test Transfer status information from I/O system to
specified destination

6. Conversions Translate Translate values in a section of memory based on a


table of correspondences.

Convert Convert the contents of word from one form to


another.

Assembly Language:

Assembly language is a low-level programming language that is one step above machine language
(binary code). It allows programmers to write instructions in a way that is easier to understand than
raw binary, but still very close to how the computer's hardware works.

Here’s a breakdown:

Key Points:

1. Close to Hardware:
o Assembly language is written to interact directly with a computer's CPU. Each
instruction in assembly language is almost one-to-one with machine code
instructions that the CPU can execute.
2. Uses Mnemonics:
o Instead of writing binary (like 10101010), assembly language uses mnemonics,
which are short, easy-to-remember words or abbreviations to represent instructions.
o For example:
 ADD means to add two numbers.
 MOV means to move data from one place to another.
3. CPU-Specific:
o Assembly language is specific to each CPU architecture. This means that the
assembly code written for one type of processor (like Intel) won’t work on another
type (like ARM) without changes.
4. Registers and Memory:
o Assembly language often works with registers (small, fast storage areas in the CPU)
and memory addresses directly, making it very efficient but more complicated than
higher-level languages.
5. More Control:
o Programmers use assembly language when they need more control over the
hardware. It’s useful in situations where you need to write very fast or very small
code, such as in embedded systems or device drivers.

Example of Assembly Code:

Here’s a simple example of assembly code:

MOV R1, 5 ; Move the value 5 into register R1


ADD R1, R2 ; Add the value in R2 to R1
This code moves the number 5 into a register (R1) and then adds the value in another register (R2)
to it.

Addressing modes - are methods used in computer architecture to specify how the operands
(data) for an instruction are chosen. Different addressing modes provide flexibility in how data is
accessed, making programming more efficient and flexible.

Here are the common types of addressing modes:

1. Immediate Addressing Mode:

 Description: The operand is directly specified within the instruction itself.


 Usage: When you want to use a constant or fixed value.
 Example: ADD R1, #5
o This means add the value 5 (which is immediate) to the value in register R1.

2. Register Addressing Mode:

 Description: The operand is located in a register. The instruction specifies the register
where the data is stored.
 Usage: This is useful when data is already loaded into CPU registers for fast access.
 Example: ADD R1, R2
o This means add the values in register R1 and R2.

3. Direct Addressing Mode (Absolute Addressing):

 Description: The address of the operand is directly specified in the instruction.


 Usage: When you know the memory address where the data is stored.
 Example: LOAD R1, 1000
o This means load the value at memory address 1000 into register R1.

4. Indirect Addressing Mode:

 Description: The instruction contains the address of a memory location, which in turn
holds the address of the actual data. So, it's like a pointer to another address.
 Usage: Used in scenarios where dynamic memory access or pointers are required.
 Example: LOAD R1, (R2)
o This means the memory address in register R2 is used to find the real memory
address where the data is stored, and that data is loaded into R1.

5. Indexed Addressing Mode:

 Description: A base address is given, and an index register is used to offset from that base
address to get the actual data.
 Usage: Common in array and table processing where you need to access a list of values.
 Example: LOAD R1, 1000(R2)
o This means load the value at the address calculated by adding the value in register
R2 to the base address 1000 into register R1.
6. Base or Register Indirect Addressing Mode:

 Description: Similar to indirect addressing but uses a register to hold the base address. It
then fetches the data from memory at the location stored in the register.
 Usage: Often used in dynamic memory or when implementing complex data structures like
linked lists.
 Example: ADD R1, (R2)
o This means add the value stored at the memory address in register R2 to the value in
R1.

7. Relative Addressing Mode:

 Description: The operand is specified as an offset relative to the current value of the
Program Counter (PC). This is mainly used in branching instructions.
 Usage: Used for jumping to a nearby instruction in the program, often in loops or
conditional statements.
 Example: JMP 200
o This means jump to the instruction located 200 bytes ahead from the current position
in the program.

8. Stack Addressing Mode:

 Description: Data is accessed from the stack, typically using special registers like the stack
pointer. Data is pushed onto or popped off the stack.
 Usage: Used in function calls and local variable storage.
 Example: PUSH R1
o This means push the value of register R1 onto the stack.

Summary Table:

Addressing Mode Description Example


Immediate Operand is a constant value within the instruction ADD R1, #5
Register Operand is in a register ADD R1, R2
Direct (Absolute) Memory address is given directly in the instruction LOAD R1, 1000
Indirect Memory address is stored in a register or another LOAD R1, (R2)
memory location
Indexed Base address + offset from index register LOAD R1,
1000(R2)
Base (Register Uses a register to point to memory address ADD R1, (R2)
Indirect)
Relative Operand is relative to the Program Counter (PC) JMP 200
Stack Data is accessed from the stack PUSH R1

Why Addressing Modes Matter:

 Flexibility: Addressing modes allow the CPU to handle data in different ways, providing
flexibility in how instructions access memory and registers.
 Efficiency: Some addressing modes (like register or immediate) allow faster access to data,
which is crucial for performance.

Instruction Format -In computer architecture, an instruction format refers to the structure or
layout of bits within an instruction, which tells the computer what operation to perform and on
which data. The instruction format defines how the parts of an instruction are organized and
includes things like the Addressing Modes , operation code (opcode) and the operands (data or
memory addresses the instruction works with).

Here’s an easy breakdown:

Key Parts of an Instruction Format:

1. Opcode (Operation Code):


o This part tells the computer what action to perform, such as addition, subtraction,
moving data, or comparing values. It’s like a command telling the computer what to
do.
2. Operands:
o Operands are the data or addresses the operation will act on. For example, if the
instruction is to add two numbers, the operands are those numbers (or the memory
addresses where the numbers are stored).
3. Addressing Mode:
o This part tells the computer how to interpret the operands. For example, whether the
operand is a direct number or a reference to a memory location where the number is
stored.

Types of Instruction Formats:


There are various instruction formats based on how many operands are used or how complex the
instruction is. Some common ones include:

1. Fixed-Length Instruction Format:


o All instructions are of the same size (usually in terms of bits, like 32 bits or 64 bits).
It makes the CPU design simpler but may lead to wasted space.
2. Variable-Length Instruction Format:
o Instructions can have different lengths depending on their complexity. This can be
more efficient for certain operations but can also make decoding instructions harder
for the CPU.-++

Types of instruction format.

1) Three - address instruction Format (3-address).

2) Two- address instruction Format (2-address).

3) One address instruction Format (1-ddress field)

4) zero- address instruction format (0-Address field)


Out of these, 3-address & 2-addrees Instruction Format comes under general register
organisation. In this all operation carried out in CPU through general registers. General registers
R1, R2, R3 (for both instructions & data)

One instruction organisation based on single accumulator organisation. Where CPU uses only on
Accumulator register Zero address instruction format uses stack organisation where CPU take help
of stack for each operation.

3 instruct. address -
A, B, C & D-are memory addresses
Expression is
X= (A+B) * (C+D)
3 inst add - (operation consists 3 address field)

ADD RI, A, B
R1= m(A)+m(B)
Memory content of A are added into memory content of B &result store into R1.

ADD R2, C,D


R2=m(c)+m(D)
memory content of C are added into mem. content of D & result is stored in R2-

MUL X, R1, R2

X=R1* R2 Content of R1 & R2 are multiplied and result stored in X.

2 instruct. address -
X= (A+B) * (C+D)

MOV R1, A
R1=m (A)
Memory content of A moved to R1.

ADD R1, B
R1= m(B) + R1
mem. content of B is added toR1& result stored in R1

MOV R2, C
R2=m(c)
mem. contentof C are moved to R2.

ADD R2, D
R2 =R2+m(D)
mem. content of D added into R2 & result stored in R2

MUL R1, R2
R1=R1*R2
Content of R1&R2 are multiplied
MOV X, R1
X=R1
result in Ri is moved to X.

One instruction address(only Accumulator is used)


Load A
Acc=m(A)
Memory content of A loaded in Accumulator.

ADD B
Acc= m (B) + Acc
mem. content of B is added to Acc &result stored in A .

STORE T
T=ACC
result of (A+B) is moved to mem.location T

Load C
Acc←m(C)
memory content of c are loaded to Acc.

ADD D
Acc=m (D) + Acc.
mem. content of D are added to Accumulator &result store in Acc.

MUL,T
Acc=A (C+D)*T(A+B)

STORE X
Acc content (Result) moved to X.

ZERO instruction address (use stack only)


PUSH A
top of stack-A

PUSHB
top of stack-B

ADD
top of stack-(A+B)

PUSH C
top of stack - C
PUSH D
top of stack-D

ADD
top of stack-(C+D)

MUL
top of stack-(A+B)+(C+D)

POP X
Result will be store in X location

Instruction Types- In computer architecture, instructions are commands given to the CPU to
perform specific operations. These instructions tell the CPU what to do, such as performing
arithmetic, moving data, or controlling the program's flow. Instructions are categorized based on the
type of operation they perform. Here's an overview of the common types of instructions:

1. Data Transfer Instructions

 Purpose: These instructions are used to move data from one location to another, like
between memory and registers or between registers themselves.
 Examples:
o MOV (Move): Transfer data from one register to another or from memory to a
register.
o LOAD (LDR): Load data from memory into a register.
o STORE (STR): Store data from a register into memory.
 Example Code:

assembly
Copy code
MOV R1, R2 ; Move the data from register R2 to R1
LOAD R1, 1000 ; Load data from memory address 1000 into R1

2. Arithmetic Instructions

 Purpose: These instructions perform arithmetic operations such as addition, subtraction,


multiplication, and division.
 Examples:
o ADD: Add two values.
o SUB: Subtract one value from another.
o MUL: Multiply two values.
o DIV: Divide one value by another.
 Example Code:

assembly
Copy code
ADD R1, R2 ; Add the values in registers R1 and R2, store the result in R1
SUB R1, R3 ; Subtract the value in R3 from R1
3. Logical Instructions

 Purpose: These instructions perform logical operations such as AND, OR, NOT, and XOR
on binary data.
 Examples:
o AND: Perform a bitwise AND between two values.
o OR: Perform a bitwise OR between two values.
o NOT: Perform a bitwise NOT (inversion) of a value.
o XOR: Perform a bitwise XOR (exclusive OR) between two values.
 Example Code:

assembly
Copy code
AND R1, R2 ; Perform AND between the values in R1 and R2
OR R1, R3 ; Perform OR between R1 and R3

4. Control Flow Instructions

 Purpose: These instructions control the flow of the program, like making decisions or
jumping to different parts of the program.
 Examples:
o JMP (Jump): Jump to a specified instruction.
o CALL: Call a subroutine or function.
o RET: Return from a subroutine or function.
o CMP (Compare): Compare two values and set the condition codes for conditional
operations.
o JE (Jump if Equal): Jump to a location if two values are equal.
 Example Code:

assembly
Copy code
CMP R1, R2 ; Compare R1 and R2
JE 200 ; If R1 equals R2, jump to instruction at address 200
JMP 300 ; Unconditional jump to address 300

5. I/O Instructions
 Purpose: These instructions handle input/output operations, allowing data to be transferred
between the CPU and external devices like a keyboard, mouse, or printer.
 Examples:
o IN: Input data from an I/O device to a register.
o OUT: Output data from a register to an I/O device.
 Example Code:

assembly
Copy code
IN R1, 01H ; Read data from input port 01H into R1
OUT 02H, R1 ; Output data from R1 to output port 02H
Summary Table:

Instruction Purpose Examples


Type
Data Transfer Move data between registers or memory MOV, LOAD,
STORE
Arithmetic Perform arithmetic operations like addition, ADD, SUB, MUL,
subtraction DIV
Logical Perform logical operations like AND, OR, XOR AND, OR, XOR
Control Flow Direct the flow of program execution JMP, CALL, RET

I/O Perform input/output operations with devices IN, OUT

Instruction execution -refers to the process by which a computer's CPU (Central Processing
Unit) reads and performs the instructions of a program, step by step. It’s like a machine following a
set of directions to complete a task.

Here’s a simple breakdown of how instruction execution works:

1. Fetch:

 The CPU starts by fetching the next instruction from the computer's memory. Instructions
are stored in memory as part of the program you're running.
 The CPU has a special register called the Program Counter (PC) that keeps track of where
the next instruction is located in memory.
 Example: If the next instruction is "ADD R1, R2, R3" (meaning add the contents of
registers R2 and R3, and store the result in R1), the CPU fetches this instruction from
memory.

2. Decode:

 Once the instruction is fetched, the CPU needs to decode it. This means breaking the
instruction down into parts to understand what operation it is supposed to do (like addition
or subtraction) and which data or registers it will use.

3. Execute:

 After decoding, the CPU moves on to execute the instruction. It carries out the specified
operation.
 For example, if the instruction is "ADD R1, R2, R3," the CPU will add the values in R2 and
R3 (two registers that hold data) and then store the result in R1.
 Other operations could include moving data between memory locations, multiplying
numbers, or even jumping to another part of the program.

4. Writeback (if needed):

 After executing the instruction, if there's a result (like after an addition), the CPU will write
back the result to the appropriate place. This could be a register or a memory location.
 For example, after adding numbers in "ADD R1, R2, R3," the CPU will store the sum back
into register R1.

5. Update Program Counter:

 Once the instruction is fully executed, the CPU updates the Program Counter (PC) to
point to the next instruction in memory.
 The cycle then repeats with the CPU fetching, decoding, and executing the next instruction.

Machine State and Processor Status (Simplified)

In a computer, the machine state and processor status are important concepts that help keep track
of what the computer is doing at any given moment, especially during the execution of instructions.
Let’s break them down in easy language:

1. Machine State

The machine state refers to the overall status or condition of the computer’s system at a particular
time. It includes all the important information that the computer needs to know in order to continue
working correctly.

Key Parts of the Machine State:

 CPU Registers: These are small storage areas inside the processor that hold data, addresses,
or instructions that the CPU is currently using.
 Memory Content: This includes the data and instructions stored in the computer’s RAM
(main memory) that the CPU is working on.
 Program Counter (PC): This tells the CPU which instruction to execute next.
 I/O Status: The current status of input/output devices like the keyboard, mouse, and
network interfaces.
 Other System Resources: Things like timers, interrupt flags, and more, depending on the
specific system.

2. Processor Status (Processor Status Word - PSW)

The processor status, or Processor Status Word (PSW), is a special set of flags and bits inside
the CPU that keeps track of important conditions during the execution of instructions. It helps the
CPU understand what just happened after it performed an operation (like whether the result was
zero, negative, or caused an error).

Key Components of the Processor Status:

 Condition Flags: These are bits that indicate the result of the most recent operation.
Common flags include:
o Zero Flag (Z): Set to 1 if the result of an operation is zero.
o Carry Flag (C): Set to 1 if an operation resulted in a carry (useful in addition).
o Sign Flag (S): Set to 1 if the result is negative.
o Overflow Flag (V): Set to 1 if an arithmetic operation caused an overflow (when the
result is too big for the system to handle).
 Interrupt Enable/Disable Flags: These control whether the processor can be interrupted
by external events, like input from the keyboard or a network signal.

Introduction to RISC and CISC Architectures


RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) are two
types of CPU architectures that define how processors handle instructions. These architectures
determine how a computer executes tasks, processes data, and interacts with memory.

1. RISC (Reduced Instruction Set Computer)

What is RISC?

 RISC is a design philosophy where the processor is built to execute a small number of
simple instructions.
 Each instruction is designed to perform a basic task and is executed in one clock cycle.
 RISC focuses on speed and efficiency by keeping the instruction set small and simple.

Key Features of RISC:

 Simple Instructions: Each instruction performs a basic operation (like adding two numbers
or loading data from memory).
 Fixed Instruction Size: All instructions are the same size, which makes it easier to fetch
and decode them quickly.
 One Clock Cycle Per Instruction: Instructions are executed in one clock cycle, making the
CPU faster.
 Load and Store Architecture: Data must be loaded into the CPU’s registers before it can
be operated on, and results are stored back in memory later.
 More Registers: RISC processors typically have more registers to store data temporarily.

Example:

Imagine you want to add two numbers from memory. In a RISC processor, you would:

1. LOAD the first number from memory into a register.


2. LOAD the second number into another register.
3. ADD the two registers.
4. STORE the result back into memory.

Each step is done in a separate instruction, which makes it simple and fast.

Advantages of RISC:

 Faster due to simpler and fewer instructions.


 More efficient use of memory and power.
 Easier to optimize and design compilers for RISC architectures.

Examples of RISC Processors:

 ARM (used in smartphones, tablets, and many embedded systems).


 MIPS (used in routers, gaming consoles, and some computers).

2.CISC (Complex Instruction Set Computer)

What is CISC?

 CISC is an architecture where the processor has a large set of complex instructions,
allowing it to perform multiple tasks with a single instruction.
 CISC instructions can perform multiple operations (like loading data, performing arithmetic,
and storing data) all at once.

Key Features of CISC:

 Complex Instructions: Each instruction can do multiple things, like load data, perform a
calculation, and store the result in memory.
 Variable Instruction Size: Instructions vary in size, some are short while others are longer
and more complex.
 Multiple Clock Cycles per Instruction: Complex instructions may take several clock
cycles to execute.
 Fewer Registers: Since instructions can work directly on memory, fewer registers are
needed.
 Rich Instruction Set: Many different types of instructions are available, which reduces the
number of instructions needed to complete tasks.

Example:

Using the same example of adding two numbers from memory, a CISC processor might:

1. ADD the two numbers directly from memory in a single instruction.

Here, one instruction can do the work of several RISC instructions.

Advantages of CISC:

 Requires fewer instructions to accomplish complex tasks.


 Less dependence on the compiler to optimize code (the processor handles more).
 Ideal for systems where memory access is slow but instructions are plentiful.

Examples of CISC Processors:

 Intel x86 (used in most desktop and laptop computers).


 AMD processors (used in many personal computers).
Key Differences Between RISC and CISC:

Parameter RISC CISC

No. of Instructions Less More

Instruction format Fixed Length Variable Length

Addressing Modes Few Large

Hardware required Less More

Cost low High

Instruction cycle single Multiple

Data Manipulation Using register Using memory

Execution Fast Slow

Control Unit Hardwired Micro program

Example Phone, tab Laptop, desktop

Summary:

 RISC architecture is designed for speed and efficiency by using simple instructions that
execute quickly.
 CISC architecture focuses on reducing the number of instructions but making each one
more powerful, even if it takes longer to execute.

Both architectures have their strengths, and modern CPUs often use a combination of RISC and
CISC principles to balance performance and complexity.

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