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CH12 COA10e

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CH12 COA10e

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© © All Rights Reserved
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+

William Stallings
Computer Organization
and Architecture
10th Edition
© 2016 Pearson Education, Inc., Hoboken,
NJ. All rights reserved.
+ Chapter 12
Instruction Sets:
Characteristics and Functions
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Machine Instruction
Characteristics

■ The operation of the processor is determined by the


instructions it executes, referred to as machine instructions or
computer instructions

■ The collection of different instructions that the processor can


execute is referred to as the processor’s instruction set

■ Each instruction must contain the information required by the


processor for execution

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Elements of a Machine Instruction

Operation code Source operand


(opcode) reference
• Specifies the operation to • The operation may involve
be performed. The one or more source
operation is specified by a operands, that is, operands
binary code, known as the that are inputs for the
operation code, or opcode operation

Result operand Next instruction


reference reference
• The operation may • This tells the processor
produce a result where to fetch the next
instruction after the
execution of this
instruction is complete

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Source and result operands can be
in one of four areas:
3) Processor register
■ A processor contains one or
1) Main or virtual memory more registers that may be
■ As with next instruction referenced by machine
references, the main or virtual instructions.
memory address must be
supplied ■ If more than one register
exists each register is
assigned a unique name or
number and the instruction
2) I/O device must contain the number of
■ The instruction must specify the desired register
the I/O module and device for 4) Immediate
the operation. If
memory-mapped I/O is used, ■ The value of the operand is
this is just another main or contained in a field in the
virtual memory address instruction being executed

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+
Instruction Representation
■ Within the computer each instruction is represented by a
sequence of bits

■ The instruction is divided into fields, corresponding to the


constituent elements of the instruction

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Instruction Representation
■ Opcodes are represented by abbreviations
called mnemonics

■ Examples include:
■ ADD Add
■ SUB Subtract
■ MUL Multiply
■ DIV Divide
■ LOAD Load data from memory
■ STOR Store data to memory

■ Operands are also represented symbolically

■ Each symbolic opcode has a fixed binary representation


■ The programmer specifies the location of each symbolic operand

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Instruction Types
•Arithmetic instructions provide •Movement of data into or out of
computational capabilities for processing register and or memory
numeric data locations
•Logic (Boolean) instructions operate on
the bits of a word as bits rather than as
numbers, thus they provide capabilities
for processing any other type of data the
user may wish to employ

Data
Data storage
processing

Data
Control
movement
•Test instructions are used to test the value of •I/O instructions are needed to
a data word or the status of a computation transfer programs and data into
•Branch instructions are used to branch to a memory and the results of
different set of instructions depending on the computations back out to the
decision made user

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Table 12.1
Utilization of Instruction Addresses
(Nonbranching Instructions)

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Instruction Set Design
Very complex because it affects so many aspects of the computer system

Defines many of the functions performed by the processor

Programmer’s means of controlling the processor

Fundamental design issues:

Operation repertoire Data types Instruction format Registers Addressing


•How many and which •The various types of data upon •Instruction length in bits, •Number of processor registers •The mode or modes by which
operations to provide and how which operations are performed number of addresses, size of that can be referenced by the address of an operand is
complex operations should be various fields, etc. instructions and their use specified

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Types of Operands

s se s
A ddre
Num
bers

Chara
cters
a l D a t a
L og ic

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Numbers

■ All machine languages include numeric data types

■ Numbers stored in a computer are limited:


■ Limit to the magnitude of numbers representable on a machine
■ In the case of floating-point numbers, a limit to their precision

■ Three types of numerical data are common in computers:


■ Binary integer or binary fixed point
■ Binary floating point
■ Decimal

■ Packed decimal
■ Each decimal digit is represented by a 4-bit code with two digits
stored per byte
■ To form numbers 4-bit codes are strung together, usually in multiples
of 8 bits

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Characters

■ A common form of data is text or character strings

■ Textual data in character form cannot be easily stored or


transmitted by data processing and communications systems
because they are designed for binary data

■ Most commonly used character code is the International


Reference Alphabet (IRA)
■ Referred to in the United States as the American Standard Code
for Information Interchange (ASCII)

■ Another code used to encode characters is the Extended


Binary Coded Decimal Interchange Code (EBCDIC)
■ EBCDIC is used on IBM mainframes

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Logical Data

■ An n-bit unit consisting of n 1-bit items of data, each item


having the value 0 or 1

■ Two advantages to bit-oriented view:


■ Memory can be used most efficiently for storing an array of
Boolean or binary data items in which each item can take on only
the values 1 (true) and 0 (false)
■ To manipulate the bits of a data item
■ If floating-point operations are implemented in software, we
need to be able to shift significant bits in some operations
■ To convert from IRA to packed decimal, we need to extract the
rightmost 4 bits of each byte

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Table 12.2

x86
Data Types

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© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Single-Instruction-Multiple-Data
(SIMD) Data Types

■ Introduced to the x86 architecture as part of the extensions of the


instruction set to optimize performance of multimedia applications

■ These extensions include MMX (multimedia extensions) and SSE


(streaming SIMD extensions)

■ Data types:
■ Packed byte and packed byte integer
■ Packed word and packed word integer
■ Packed doubleword and packed doubleword integer
■ Packed quadword and packed quadword integer
■ Packed single-precision floating-point and packed double-precision
floating-point

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


ARM Data Types
ARM processors support data
types of:
•8 (byte)
•16 (halfword)
•32 (word) bits in length

Alignment checking
All three data types can also •When the appropriate control bit is
be used for twos set, a data abort signal indicates an
complement signed integers alignment fault for attempting
unaligned access

For all three data types an Unaligned access


unsigned interpretation is
•When this option is enabled, the
supported in which the processor uses one or more
value represents an memory accesses to generate the
unsigned, nonnegative required transfer of adjacent bytes
integer transparently to the programmer

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Table 12.3
Common
Instruction Set
Operations
(page 1 of 2)

(Table can be found on page


426 in textbook.)
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Table 12.3
Common
Instruction Set
Operations
(page 2 of 2)

(Table can be found on page


426 in textbook.)

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Table 12.4
Processor Actions for Various Types of Operations

(Table can be found on page 427 in textbook.)


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Data Transfer

•Most fundamental type of machine instruction


•Must specify:
•Location of the source and destination operands
•The length of data to be transferred must be indicated
•The mode of addressing for each operand must be specified

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Table 12.5
Examples of IBM EAS/390 Data Transfer Operations

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. (Table can be found on page 428 in textbook.)
+ ■ Most machines provide the basic arithmetic
operations of add, subtract, multiply, and divide

■ These are provided for signed integer


(fixed-point) numbers

■ Often they are also provided for floating-point


and packed decimal numbers

■ Other possible operations include a variety of


single-operand instructions:
■ Absolute Arithmetic
■ Take the absolute value of the operand
■ Negate
■ Negate the operand
■ Increment
■ Add 1 to the operand
Decrement
■ Subtract 1 from the operand

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Table 12.6
Basic Logical Operations

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Table 12.7

Examples of Shift and Rotate Operations

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Instructions that
change the format
or operate on the
Conversion
format of data

An example of a
more complex
editing instruction
is the EAS/390
An example is Translate (TR)
converting instruction
from decimal
to binary

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Input/Output

■ Variety of approaches taken:


■ Isolated programmed I/O
■ Memory-mapped programmed I/O
■ DMA
■ Use of an I/O processor

■ Many implementations provide only a few I/O instructions,


with the specific actions specified by parameters, codes, or
command words

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


System Control

Instructions that can be executed only while the processor is in a certain privileged
state or is executing a program in a special privileged area of memory

Typically these instructions are reserved for the use of the operating system

Examples of system control operations:

A system control instruction An instruction to read or Access to process control


may read or alter a control modify a storage protection blocks in a multiprogramming
register key system

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+
Transfer of Control

■ Reasons why transfer-of-control operations are required:


■ It is essential to be able to execute each instruction more than
once
■ Virtually all programs involve some decision making
■ It helps if there are mechanisms for breaking the task up into
smaller pieces that can be worked on one at a time

■ Most common transfer-of-control operations found in


instruction sets:
■ Branch
■ Skip
■ Procedure call

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Skip Instructions

Typically implies that one


instruction be skipped, thus
the implied address equals
Includes an implied address
the address of the next
instruction plus one
instruction length

Because the skip instruction


Example is the
does not require a destination
increment-and-skip-if-zero
address field it is free to do
(ISZ) instruction
other things

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+
Procedure Call Instructions
■ Self-contained computer program that is incorporated into a
larger program
■ At any point in the program the procedure may be invoked, or called
■ Processor is instructed to go and execute the entire procedure and then
return to the point from which the call took place

■ Two principal reasons for use of procedures:


■ Economy
■ A procedure allows the same piece of code to be used many times
■ Modularity

■ Involves two basic instructions:


■ A call instruction that branches from the present location to the
procedure
■ Return instruction that returns from the procedure to the place from
which it was called

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
x86 Operation Types
■ The x86 provides a complex array of operation types including a
number of specialized instructions

■ The intent was to provide tools for the compiler writer to produce
optimized machine language translation of high-level language
programs

■ Provides four instructions to support procedure call/return:


■ CALL
■ ENTER
■ LEAVE
■ RETURN

■ When a new procedure is called the following must be performed upon


entry to the new procedure:
■ Push the return point on the stack
■ Push the current frame pointer on the stack
■ Copy the stack pointer as the new value of the frame pointer
■ Adjust the stack pointer to allocate a frame

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Table 12.8
x86 Status Flags

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Table
12.9
x86
Condition
Codes
for
Conditional
Jump
and
SETcc
Instructions

(Table can be found on page


440 in the textbook.)
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
Table 12.10

MMX
Instruction Set

(Table can be found on page


442 in the textbook.)
Note: If an instruction supports multiple data types [byte (B), word (W), doubleword (D), quadword
(Q)], the data types are indicated in brackets.
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
x86 Single-Instruction,
Multiple-Data (SIMD) Instructions
■ 1996 Intel introduced MMX technology into its Pentium
product line
■ MMX is a set of highly optimized instructions for multimedia tasks

■ Video and audio data are typically composed of large arrays


of small data types

■ Three new data types are defined in MMX


■ Packed byte
■ Packed word
■ Packed doubleword

■ Each data type is 64 bits in length and consists of multiple


smaller data fields, each of which holds a fixed-point integer

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
ARM Operation Types

Load and store Branch Data-processing


instructions instructions instructions

Parallel addition
Multiply Extend
and subtraction
instructions instructions
instructions

Status register
access instructions

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


Table 12.11

ARM
Conditions
for
Conditional
Instruction
Execution

(Table can be found on


Page 445 in the textbook.)

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.


+ Summary Instruction Sets:
Characteristics and
Chapter 12 Functions

■ Machine instruction ■ Intel x86 and ARM data types


characteristics
■ Types of operations
■ Elements of a machine
instruction ■ Data transfer
■ Instruction representation ■ Arithmetic
■ Instruction types ■ Logical
■ Number of addresses ■ Conversion
■ Instruction set design ■ Input/output
■ Types of operands ■ System control
■ Numbers ■ Transfer of control
■ Characters
■ Logical data ■ Intel x86 and ARM operation
types
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

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