OAK - Week 11b
OAK - Week 11b
William Stallings
Computer Organization
and Architecture
9th Edition
Chapter 12
+
Instruction Sets:
Characteristics and Functions
+
Machine Instruction
Characteristics
Data Data
processing storage
Data
Control
movement
• Test instructions are used to test the • I/O instructions are needed
value of a data word or the status of a to transfer programs and
computation data into memory and the
• Branch instructions are used to branch results of computations
to a different set of instructions back out to the user
depending on the decision made
+
Number of Addresses
+
Table 12.1
Utilization of Instruction Addresses
(Nonbranching Instructions)
Instruction Set Design
Very complex because it affects so many aspects of the computer system
◼ Packed decimal
◼ Each decimal digit is represented by a 4-bit code with two digits
stored per byte
◼ To form numbers 4-bit codes are strung together, usually in multiples
of 8 bits
+
Characters
◼ Data types:
◼ Packed byte and packed byte integer
◼ Packed word and packed word integer
◼ Packed doubleword and packed doubleword integer
◼ Packed quadword and packed quadword integer
◼ Packed single-precision floating-point and packed double-precision
floating-point
ARM Data Types
ARM processors support
data types of:
•8 (byte)
•16 (halfword)
•32 (word) bits in length
Common
Instruction Set
Operations
(page 1 of 2)
+
Table 12.3
Common
Instruction
Set
Operations
(page 2 of 2)
Table 12.4
Processor Actions for Various Types of Operations
Data Transfer
Must specify:
• Location of the source and
destination operands
Most fundamental type of • The length of data to be
machine instruction transferred must be indicated
• The mode of addressing for each
operand must be specified
Table 12.5
Examples of IBM EAS/390 Data Transfer Operations
+
◼ Most machines provide the basic arithmetic
operations of add, subtract, multiply, and divide
An example of a more
An example is complex editing
converting from instruction is the
decimal to binary EAS/390 Translate (TR)
instruction
+
Input/Output
Typically these instructions are reserved for the use of the operating
system
Branch
Instruction
Skip Instructions
x86
Operation
Types (With
Examples of
+ Typical
Operations)
(page 1 of 2)
Table 12.8
x86
Operation
Types (With
Examples of
Typical
Operations)
(page 2 of 2)
+
Call/Return Instructions
◼ The CALL instruction pushes the current instruction pointer value onto
the stack and causes a jump to the entry point of the procedure by
placing the address of the entry point in the instruction pointer
◼ The ENTER instruction was added to the instruction set to provide direct
support for the compiler
x86 Status Flags
Table 12.10
x86
Condition
Codes for
Conditional
Jump and
SETcc
Instructions
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x86 Single-Instruction, Multiple-
Data (SIMD) Instructions
◼ 1996 Intel introduced MMX technology into its Pentium
product line
◼ MMX is a set of highly optimized instructions for multimedia tasks
Note: If an instruction supports multiple data types [byte (B), word (W), doubleword (D), quadword
(Q)], the data types are indicated in brackets.
+
Image Compositing
on Color Plane
Representation
ARM Operation Types
Parallel addition
Multiply Extend
and subtraction
instructions instructions
instructions
Status register
access
instructions
ARM
Conditions
for
Conditional
Instruction
Execution
+ Summary Instruction Sets:
Characteristics and
Functions
Chapter 12
◼ Intel x86 and ARM data types
◼ Machine instruction
◼ Types of operations
characteristics
◼ Data transfer
◼ Elements of a machine
instruction ◼ Arithmetic
◼ Instruction representation ◼ Logical
◼ Instruction types ◼ Conversion
◼ Number of addresses ◼ Input/output
◼ Instruction set design ◼ System control
◼ Types of operands ◼ Transfer of control
◼ Numbers
◼ Intel x86 and ARM operation
◼ Characters
types
◼ Logical data