Module III Dcf (Combinational Circuits)
Module III Dcf (Combinational Circuits)
COMBINATIONAL CIRCUITS
Combinational Circuit
• It is a circuit in which we combine the different gates in the circuit:
• The output of combinational circuit depends only on the input of the circuit.
• The combinational circuit do not use any memory.
• The previous state of input/output does not have any effect on the present state
of the circuit.
• A combinational circuit can have ‘n’ number of inputs and ‘m’ number of outputs.
• Examples: Half Adder, Full Adder etc.
Half Adder
• Half adder is a combinational logic circuit with two inputs and two
outputs.
• The half adder circuit is designed to add two single bit binary
numbers.
• The circuit has two outputs: carry & sum.
HALF ADDER USING NAND GATES ONY
XOR gate using NAND gate
• An XOR gate can be constructed from NAND gates as shown below:
=
Full Adder
• Full adder is a combinational logic circuit with three inputs and two
outputs.
• The full adder circuit is designed to add two single bit binary numbers
and a carry input.
• The circuit has two outputs: carry & sum.
IMPLEMENTATION OF FULL ADDER USING 2 HALF ADDERS
4-bit Parallel Adder
• A 4-bit parallel adder is implemented using One Half Adder and Three
Full Adders.
• There are two 4-bit numbers A (A3A2A1A0) and B (B3B2B1B0).
• The Parallel Adder performs (A+B) and produces the sum S(S3S2S1S0).
• The LSB’s of A and B (ie. A0 and B0) are added together to get the LSB
of Sum (S0). Likewise, other corresponding bits of A and B are added.
• The carry output of each adder is connected to the carry input of next
higher-order adder.
4-bit Parallel Adder/Subtractor
• The addition and subtraction operations can be combined into one
circuit.
• There are two 4-bit numbers A (A3A2A1A0) and B (B3B2B1B0).
• The mode select line M is used to select addition or subtraction.
• If M=0, the circuit performs addition of A and B (A+B). If M=1, the
circuit performs subtraction (A-B).
• It performs the subtraction by taking the 2’s complement of B and
then adding it to A.
• If M=1, the XOR gates take the 1’s complement of each bit of B. Then,
the value of M (ie. 1) is added to it to get the 2’s complement of B.
• Then, the 2’s complement of B is added to A to perform the
subtraction.
(Mode select)
M = 0 for Addition
M = 1 for Subtraction
Binary Coded Decimal (BCD) number or
8421 code
• BCD is a way to convert decimal numbers into binary
numbers.
• Here, each digit (0 through 9) in a decimal number is written
as a four digit binary code.
BCD Addition
• Perform addition of two BCD numbers by following the rules of binary
addition.
• If the result or sum is a 4-bit binary number which is less than or
equal to 9, then the sum is valid.
• If the sum is a 4-bit number that is greater than 9 or if a carry is
generated, then it is invalid.
• To obtain the corrected sum, add 6 (0110) to the 4-bit invalid sum.
BCD ADDITION
1-bit binary multiplier
• Multiplies two 1-bit numbers A and B and gives as result their product
P as (AxB)
• Types of encoders:
✓Priority encoder
✓Decimal to BCD encoder
✓Octal to Binary encoder
✓Hexadecimal to Binary encoder
Decimal-to-BCD Encoder
• This type of encoder has 10 inputs-one for each decimal digit-and 4
outputs corresponding to the BCD code.
• This is a 10-line-to-4-line encoder.
Priority Encoder
• A priority encoder can be used in applications that require priority
detection.
• It will produce a BCD output corresponding to the highest-order
decimal digit input that is active and will ignore any other lower-order
active inputs. The value of V=1, indicates that the input is valid.
Decoder
• A decoder accepts a set of inputs that represents a binary number
and activates only that output corresponding to the input number.
• An encoder has ‘N’ input lines and ‘M’ output lines such that M = 2N.
• Some decoders have an ENABLE (E) input to control the operation of
the decoder.
• Types of decoders:
✓2-to-4-line decoder
✓BCD-to-Decimal decoder
✓BCD-to-Seven Segment decoder
2-to-4-line Decoder
• This type of decoder has 2 inputs and 4 outputs (22).
• One of the four outputs will be ‘1’ for ech combination of inputs,
when enable, E is ‘1’.
• From the truth table, we can write the Boolean expressions for each output
as:
Parity Bit Generator
• A parity bit is an extra bit included with a binary message to make the
number of 1’s either odd or even.
• The message, including the parity bit, is transmitted and then checked
at the receiving end for errors.
• An error is detected if the checked parity does not correspond with
the one transmitted.
• The circuit that generates the parity bit in the transmitter is called a
parity generator.
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